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Searched refs:U2_PHY_BASE_P0 (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/mips/mediatek/
H A Dmtk_xhci.c230 #define U2_PHY_BASE_P0 0x10800 macro
287 CLRSET4(sc, U2_PHY_BASE_P0 + U2_PHYD_CR1, U2_PHYD_CR1_MASK, in mtk_xhci_fdt_init()