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Searched refs:TRCVIIECTLR (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm64/coresight/
H A Dcoresight_etm4x.c144 reg = bus_read_4(sc->res, TRCVIIECTLR); in etm_prepare()
146 bus_write_4(sc->res, TRCVIIECTLR, reg); in etm_prepare()
157 bus_write_4(sc->res, TRCVIIECTLR, 0); in etm_prepare()
H A Dcoresight_etm4x.h94 #define TRCVIIECTLR 0x084 /* Trace ViewInst Include/Exclude Control Register */ macro