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Searched refs:TEGRA30_CLK_PLL_A_OUT0 (Results 1 – 8 of 8) sorted by relevance

/f-stack/freebsd/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra30-car.h212 #define TEGRA30_CLK_PLL_A_OUT0 185 macro
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra-audio-sgtl5000.txt39 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dtegra30-cardhu.dtsi595 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
602 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
H A Dtegra30-colibri.dtsi1033 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1040 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
H A Dtegra30-asus-nexus7-grouper-common.dtsi1183 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1190 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
H A Dtegra30-apalis.dtsi1174 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1181 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
H A Dtegra30-apalis-v1.1.dtsi1192 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1199 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
H A Dtegra30-beaver.dts2103 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2110 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,