Searched refs:TEGRA124_CLK_PCLK (Results 1 – 4 of 4) sorted by relevance
291 #define TEGRA124_CLK_PCLK 261 macro
262 GATE_INV(TEGRA124_CLK_PCLK, "pclk", "pclk_div", CLK_SYSTEM_RATE, 3),
587 clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
607 clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;