Home
last modified time | relevance | path

Searched refs:TCSR_DIV_256 (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/mips/ingenic/
H A Djz4780_machdep.c106 writereg(JZ_TCU_BASE + JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256); in platform_reset()
H A Djz4780_regs.h65 #define TCSR_DIV_256 0x20 macro