Home
last modified time | relevance | path

Searched refs:SOR_PLL0_PWR (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm/nvidia/drm2/
H A Dtegra_hdmi_reg.h165 #define SOR_PLL0_PWR (1 << 0) macro
H A Dtegra_hdmi.c669 val &= ~SOR_PLL0_PWR; in hdmi_sor_start()
798 val &= ~SOR_PLL0_PWR; in hdmi_enable()