1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2003-2012 Broadcom Corporation 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef __NLM_SGMII_H__ 34 #define __NLM_SGMII_H__ 35 36 /** 37 * @file_name sgmii.h 38 * @author Netlogic Microsystems 39 * @brief Basic definitions of XLP SGMII ports 40 */ 41 42 #define SGMII_MAC_CONF1(block, i) NAE_REG(block, i, 0x00) 43 #define SGMII_MAC_CONF2(block, i) NAE_REG(block, i, 0x01) 44 #define SGMII_IPG_IFG(block, i) NAE_REG(block, i, 0x02) 45 #define SGMII_HLF_DUP(block, i) NAE_REG(block, i, 0x03) 46 #define SGMII_MAX_FRAME(block, i) NAE_REG(block, i, 0x04) 47 #define SGMII_TEST(block, i) NAE_REG(block, i, 0x07) 48 #define SGMII_MIIM_CONF(block, i) NAE_REG(block, i, 0x08) 49 #define SGMII_MIIM_CMD(block, i) NAE_REG(block, i, 0x09) 50 #define SGMII_MIIM_ADDR(block, i) NAE_REG(block, i, 0x0a) 51 #define SGMII_MIIM_CTRL(block, i) NAE_REG(block, i, 0x0b) 52 #define SGMII_MIIM_STAT(block, i) NAE_REG(block, i, 0x0c) 53 #define SGMII_MIIM_IND(block, i) NAE_REG(block, i, 0x0d) 54 #define SGMII_IO_CTRL(block, i) NAE_REG(block, i, 0x0e) 55 #define SGMII_IO_STAT(block, i) NAE_REG(block, i, 0x0f) 56 #define SGMII_STATS_MLR(block, i) NAE_REG(block, i, 0x1f) 57 #define SGMII_STATS_TR64(block, i) NAE_REG(block, i, 0x20) 58 #define SGMII_STATS_TR127(block, i) NAE_REG(block, i, 0x21) 59 #define SGMII_STATS_TR255(block, i) NAE_REG(block, i, 0x22) 60 #define SGMII_STATS_TR511(block, i) NAE_REG(block, i, 0x23) 61 #define SGMII_STATS_TR1K(block, i) NAE_REG(block, i, 0x24) 62 #define SGMII_STATS_TRMAX(block, i) NAE_REG(block, i, 0x25) 63 #define SGMII_STATS_TRMGV(block, i) NAE_REG(block, i, 0x26) 64 #define SGMII_STATS_RBYT(block, i) NAE_REG(block, i, 0x27) 65 #define SGMII_STATS_RPKT(block, i) NAE_REG(block, i, 0x28) 66 #define SGMII_STATS_RFCS(block, i) NAE_REG(block, i, 0x29) 67 #define SGMII_STATS_RMCA(block, i) NAE_REG(block, i, 0x2a) 68 #define SGMII_STATS_RBCA(block, i) NAE_REG(block, i, 0x2b) 69 #define SGMII_STATS_RXCF(block, i) NAE_REG(block, i, 0x2c) 70 #define SGMII_STATS_RXPF(block, i) NAE_REG(block, i, 0x2d) 71 #define SGMII_STATS_RXUO(block, i) NAE_REG(block, i, 0x2e) 72 #define SGMII_STATS_RALN(block, i) NAE_REG(block, i, 0x2f) 73 #define SGMII_STATS_RFLR(block, i) NAE_REG(block, i, 0x30) 74 #define SGMII_STATS_RCDE(block, i) NAE_REG(block, i, 0x31) 75 #define SGMII_STATS_RCSE(block, i) NAE_REG(block, i, 0x32) 76 #define SGMII_STATS_RUND(block, i) NAE_REG(block, i, 0x33) 77 #define SGMII_STATS_ROVR(block, i) NAE_REG(block, i, 0x34) 78 #define SGMII_STATS_RFRG(block, i) NAE_REG(block, i, 0x35) 79 #define SGMII_STATS_RJBR(block, i) NAE_REG(block, i, 0x36) 80 #define SGMII_STATS_TBYT(block, i) NAE_REG(block, i, 0x38) 81 #define SGMII_STATS_TPKT(block, i) NAE_REG(block, i, 0x39) 82 #define SGMII_STATS_TMCA(block, i) NAE_REG(block, i, 0x3a) 83 #define SGMII_STATS_TBCA(block, i) NAE_REG(block, i, 0x3b) 84 #define SGMII_STATS_TXPF(block, i) NAE_REG(block, i, 0x3c) 85 #define SGMII_STATS_TDFR(block, i) NAE_REG(block, i, 0x3d) 86 #define SGMII_STATS_TEDF(block, i) NAE_REG(block, i, 0x3e) 87 #define SGMII_STATS_TSCL(block, i) NAE_REG(block, i, 0x3f) 88 #define SGMII_STATS_TMCL(block, i) NAE_REG(block, i, 0x40) 89 #define SGMII_STATS_TLCL(block, i) NAE_REG(block, i, 0x41) 90 #define SGMII_STATS_TXCL(block, i) NAE_REG(block, i, 0x42) 91 #define SGMII_STATS_TNCL(block, i) NAE_REG(block, i, 0x43) 92 #define SGMII_STATS_TJBR(block, i) NAE_REG(block, i, 0x46) 93 #define SGMII_STATS_TFCS(block, i) NAE_REG(block, i, 0x47) 94 #define SGMII_STATS_TXCF(block, i) NAE_REG(block, i, 0x48) 95 #define SGMII_STATS_TOVR(block, i) NAE_REG(block, i, 0x49) 96 #define SGMII_STATS_TUND(block, i) NAE_REG(block, i, 0x4a) 97 #define SGMII_STATS_TFRG(block, i) NAE_REG(block, i, 0x4b) 98 #define SGMII_STATS_CAR1(block, i) NAE_REG(block, i, 0x4c) 99 #define SGMII_STATS_CAR2(block, i) NAE_REG(block, i, 0x4d) 100 #define SGMII_STATS_CAM1(block, i) NAE_REG(block, i, 0x4e) 101 #define SGMII_STATS_CAM2(block, i) NAE_REG(block, i, 0x4f) 102 #define SGMII_MAC_ADDR0_LO(block, i) NAE_REG(block, i, 0x50) 103 #define SGMII_MAC_ADDR0_HI(block, i) NAE_REG(block, i, 0x51) 104 #define SGMII_MAC_ADDR1_LO(block, i) NAE_REG(block, i, 0x52) 105 #define SGMII_MAC_ADDR1_HI(block, i) NAE_REG(block, i, 0x53) 106 #define SGMII_MAC_ADDR2_LO(block, i) NAE_REG(block, i, 0x54) 107 #define SGMII_MAC_ADDR2_HI(block, i) NAE_REG(block, i, 0x55) 108 #define SGMII_MAC_ADDR3_LO(block, i) NAE_REG(block, i, 0x56) 109 #define SGMII_MAC_ADDR3_HI(block, i) NAE_REG(block, i, 0x57) 110 #define SGMII_MAC_ADDR_MASK0_LO(block, i) NAE_REG(block, i, 0x58) 111 #define SGMII_MAC_ADDR_MASK0_HI(block, i) NAE_REG(block, i, 0x59) 112 #define SGMII_MAC_ADDR_MASK1_LO(block, i) NAE_REG(block, i, 0x5a) 113 #define SGMII_MAC_ADDR_MASK1_HI(block, i) NAE_REG(block, i, 0x5b) 114 #define SGMII_MAC_FILTER_CONFIG(block, i) NAE_REG(block, i, 0x5c) 115 #define SGMII_HASHTBL_VEC_B31_0(block, i) NAE_REG(block, i, 0x60) 116 #define SGMII_HASHTBL_VEC_B63_32(block, i) NAE_REG(block, i, 0x61) 117 #define SGMII_HASHTBL_VEC_B95_64(block, i) NAE_REG(block, i, 0x62) 118 #define SGMII_HASHTBL_VEC_B127_96(block, i) NAE_REG(block, i, 0x63) 119 #define SGMII_HASHTBL_VEC_B159_128(block, i) NAE_REG(block, i, 0x64) 120 #define SGMII_HASHTBL_VEC_B191_160(block, i) NAE_REG(block, i, 0x65) 121 #define SGMII_HASHTBL_VEC_B223_192(block, i) NAE_REG(block, i, 0x66) 122 #define SGMII_HASHTBL_VEC_B255_224(block, i) NAE_REG(block, i, 0x67) 123 #define SGMII_HASHTBL_VEC_B287_256(block, i) NAE_REG(block, i, 0x68) 124 #define SGMII_HASHTBL_VEC_B319_288(block, i) NAE_REG(block, i, 0x69) 125 #define SGMII_HASHTBL_VEC_B351_320(block, i) NAE_REG(block, i, 0x6a) 126 #define SGMII_HASHTBL_VEC_B383_352(block, i) NAE_REG(block, i, 0x6b) 127 #define SGMII_HASHTBL_VEC_B415_384(block, i) NAE_REG(block, i, 0x6c) 128 #define SGMII_HASHTBL_VEC_B447_416(block, i) NAE_REG(block, i, 0x6d) 129 #define SGMII_HASHTBL_VEC_B479_448(block, i) NAE_REG(block, i, 0x6e) 130 #define SGMII_HASHTBL_VEC_B511_480(block, i) NAE_REG(block, i, 0x6f) 131 132 #define SGMII_NETIOR_VLANTYPE_FILTER(block, i) NAE_REG(block, i, 0x76) 133 #define SGMII_NETIOR_RXDROP_CNTR(block, i) NAE_REG(block, i, 0x77) 134 #define SGMII_NETIOR_PAUSE_QUANTAMULT(block, i) NAE_REG(block, i, 0x78) 135 #define SGMII_NETIOR_MAC_CTRL_OPCODE(block, i) NAE_REG(block, i, 0x79) 136 #define SGMII_NETIOR_MAC_DA_H(block, i) NAE_REG(block, i, 0x7a) 137 #define SGMII_NETIOR_MAC_DA_L(block, i) NAE_REG(block, i, 0x7b) 138 #define SGMII_NET_IFACE_CTRL3(block, i) NAE_REG(block, i, 0x7c) 139 #define SGMII_NETIOR_GMAC_STAT(block, i) NAE_REG(block, i, 0x7d) 140 #define SGMII_NET_IFACE_CTRL2(block, i) NAE_REG(block, i, 0x7e) 141 #define SGMII_NET_IFACE_CTRL(block, i) NAE_REG(block, i, 0x7f) 142 143 #if !defined(LOCORE) && !defined(__ASSEMBLY__) 144 /* speed */ 145 enum nlm_sgmii_speed { 146 NLM_SGMII_SPEED_10, 147 NLM_SGMII_SPEED_100, 148 NLM_SGMII_SPEED_1000, 149 NLM_SGMII_SPEED_RSVD 150 }; 151 152 /* duplexity */ 153 enum nlm_sgmii_duplex_mode { 154 NLM_SGMII_DUPLEX_AUTO, 155 NLM_SGMII_DUPLEX_HALF, 156 NLM_SGMII_DUPLEX_FULL 157 }; 158 159 /* stats */ 160 enum { 161 nlm_sgmii_stats_mlr, 162 nlm_sgmii_stats_tr64, 163 nlm_sgmii_stats_tr127, 164 nlm_sgmii_stats_tr255, 165 nlm_sgmii_stats_tr511, 166 nlm_sgmii_stats_tr1k, 167 nlm_sgmii_stats_trmax, 168 nlm_sgmii_stats_trmgv, 169 nlm_sgmii_stats_rbyt, 170 nlm_sgmii_stats_rpkt, 171 nlm_sgmii_stats_rfcs, 172 nlm_sgmii_stats_rmca, 173 nlm_sgmii_stats_rbca, 174 nlm_sgmii_stats_rxcf, 175 nlm_sgmii_stats_rxpf, 176 nlm_sgmii_stats_rxuo, 177 nlm_sgmii_stats_raln, 178 nlm_sgmii_stats_rflr, 179 nlm_sgmii_stats_rcde, 180 nlm_sgmii_stats_rcse, 181 nlm_sgmii_stats_rund, 182 nlm_sgmii_stats_rovr, 183 nlm_sgmii_stats_rfrg, 184 nlm_sgmii_stats_rjbr, 185 nlm_sgmii_stats_rdummy, /* not used */ 186 nlm_sgmii_stats_tbyt, 187 nlm_sgmii_stats_tpkt, 188 nlm_sgmii_stats_tmca, 189 nlm_sgmii_stats_tbca, 190 nlm_sgmii_stats_txpf, 191 nlm_sgmii_stats_tdfr, 192 nlm_sgmii_stats_tedf, 193 nlm_sgmii_stats_tscl, 194 nlm_sgmii_stats_tmcl, 195 nlm_sgmii_stats_tlcl, 196 nlm_sgmii_stats_txcl, 197 nlm_sgmii_stats_tncl, 198 nlm_sgmii_stats_tjbr, 199 nlm_sgmii_stats_tfcs, 200 nlm_sgmii_stats_txcf, 201 nlm_sgmii_stats_tovr, 202 nlm_sgmii_stats_tund, 203 nlm_sgmii_stats_tfrg, 204 nlm_sgmii_stats_car1, 205 nlm_sgmii_stats_car2, 206 nlm_sgmii_stats_cam1, 207 nlm_sgmii_stats_cam2 208 }; 209 210 void nlm_configure_sgmii_interface(uint64_t, int, int, int, int); 211 void nlm_sgmii_pcs_init(uint64_t, uint32_t); 212 void nlm_nae_setup_mac(uint64_t, int, int, int, int, int, int, int); 213 void nlm_nae_setup_rx_mode_sgmii(uint64_t, int, int, int, int, int, 214 int, int); 215 void nlm_nae_setup_mac_addr_sgmii(uint64_t, int, int, int, uint8_t *); 216 217 #endif /* !(LOCORE) && !(__ASSEMBLY__) */ 218 219 #endif 220