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Searched refs:SET_FIELD (Results 1 – 14 of 14) sorted by relevance

/f-stack/dpdk/drivers/net/qede/base/
H A Decore_init_fw_funcs.c160 SET_FIELD(map.reg, QM_RF_PQ_MAP_PQ_VALID, 1); \
162 SET_FIELD(map.reg, QM_RF_PQ_MAP_RL_ID, rl_id); \
164 SET_FIELD(map.reg, QM_RF_PQ_MAP_VOQ, voq); \
755 SET_FIELD(mask, QM_RF_OPPORTUNISTIC_MASK_LINEVOQ, in ecore_qm_common_rt_init()
1745 SET_FIELD(cam_line, in ecore_gft_config()
1749 SET_FIELD(cam_line, in ecore_gft_config()
1753 SET_FIELD(cam_line, in ecore_gft_config()
1784 SET_FIELD(ram_line.hi, GFT_RAM_LINE_DST_IP, 1); in ecore_gft_config()
1785 SET_FIELD(ram_line.hi, GFT_RAM_LINE_SRC_IP, 1); in ecore_gft_config()
1795 SET_FIELD(ram_line.hi, GFT_RAM_LINE_DST_IP, 1); in ecore_gft_config()
[all …]
H A Decore_hw.c373 SET_FIELD(control, PXP_PRETEND_CMD_IS_CONCRETE, 1); in ecore_fid_pretend()
378 SET_FIELD(control, PXP_PRETEND_CMD_PORT, 0); in ecore_fid_pretend()
379 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 0); in ecore_fid_pretend()
380 SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_PORT, 1); in ecore_fid_pretend()
399 SET_FIELD(control, PXP_PRETEND_CMD_PORT, port_id); in ecore_port_pretend()
400 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 1); in ecore_port_pretend()
414 SET_FIELD(control, PXP_PRETEND_CMD_PORT, 0); in ecore_port_unpretend()
415 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 0); in ecore_port_unpretend()
431 SET_FIELD(control, PXP_PRETEND_CMD_PORT, port_id); in ecore_port_fid_pretend()
432 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 1); in ecore_port_fid_pretend()
[all …]
H A Decore_cxt.c1312 SET_FIELD(cdu_params, CDUC_CXT_SIZE, cxt_size); in ecore_cdu_init_common()
1314 SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page); in ecore_cdu_init_common()
1596 SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); in ecore_ilt_init_pf()
1597 SET_FIELD(ilt_hw_entry, ILT_ENTRY_PHY_ADDR, in ecore_ilt_init_pf()
1675 SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); in ecore_tm_init_pf()
1688 SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); in ecore_tm_init_pf()
1709 SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); in ecore_tm_init_pf()
1725 SET_FIELD(cfg_word, TM_CFG_PRE_SCAN_OFFSET, 0); in ecore_tm_init_pf()
1726 SET_FIELD(cfg_word, TM_CFG_PARENT_PF, 0); in ecore_tm_init_pf()
2073 SET_FIELD(ilt_hw_entry, ILT_ENTRY_VALID, 1ULL); in ecore_cxt_dynamic_ilt_alloc()
[all …]
H A Decore_int.c1552 SET_FIELD(pi_entry.prod, CAU_PI_ENTRY_FSM_SEL, 0); in _ecore_int_cau_conf_pi()
1554 SET_FIELD(pi_entry.prod, CAU_PI_ENTRY_FSM_SEL, 1); in _ecore_int_cau_conf_pi()
2041 SET_FIELD(data, IGU_CLEANUP_CLEANUP_TYPE, type); in ecore_int_igu_cleanup_sb()
2046 SET_FIELD(cmd_ctrl, IGU_CTRL_REG_PXP_ADDR, pxp_addr); in ecore_int_igu_cleanup_sb()
2047 SET_FIELD(cmd_ctrl, IGU_CTRL_REG_FID, opaque_fid); in ecore_int_igu_cleanup_sb()
2272 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, in ecore_int_igu_reset_cam()
2275 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, in ecore_int_igu_reset_cam()
2279 SET_FIELD(val, IGU_MAPPING_LINE_VALID, p_block->is_pf); in ecore_int_igu_reset_cam()
2536 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, in ecore_int_igu_relocate_sb()
2539 SET_FIELD(val, IGU_MAPPING_LINE_VALID, p_block->is_pf); in ecore_int_igu_relocate_sb()
[all …]
H A Decore_l2.c391 SET_FIELD(tx_err, ETH_TX_ERR_VALS_PACKET_TOO_SMALL, in ecore_sp_eth_vport_start()
403 SET_FIELD(tx_err, ETH_TX_ERR_VALS_MTU_VIOLATION, in ecore_sp_eth_vport_start()
496 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
499 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
502 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
505 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
508 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
511 SET_FIELD(capabilities, in ecore_sp_vport_update_rss()
593 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, in ecore_sp_update_accept_mode()
600 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, in ecore_sp_update_accept_mode()
[all …]
H A Decore_spq.c234 SET_FIELD(*p_flags10, XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN, 1); in ecore_spq_hw_initialize()
235 SET_FIELD(*p_flags1, XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE, 1); in ecore_spq_hw_initialize()
236 SET_FIELD(*p_flags9, XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN, 1); in ecore_spq_hw_initialize()
562 SET_FIELD(p_db_data->params, CORE_DB_DATA_DEST, DB_DEST_XCM); in ecore_spq_setup()
563 SET_FIELD(p_db_data->params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_MAX); in ecore_spq_setup()
564 SET_FIELD(p_db_data->params, CORE_DB_DATA_AGG_VAL_SEL, in ecore_spq_setup()
H A Decore_sriov.c407 SET_FIELD(params.flags, DMAE_PARAMS_DST_VF_VALID, 0x1); in ecore_iov_post_vf_bulletin()
926 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id); in ecore_iov_enable_vf_access()
999 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id); in ecore_iov_alloc_vf_igu_sbs()
1000 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1); in ecore_iov_alloc_vf_igu_sbs()
1001 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0); in ecore_iov_alloc_vf_igu_sbs()
1010 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid); in ecore_iov_alloc_vf_igu_sbs()
1058 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0); in ecore_iov_free_vf_igu_sbs()
1468 SET_FIELD(params.flags, DMAE_PARAMS_DST_VF_VALID, 0x1); in ecore_iov_send_response()
4502 SET_FIELD(params.flags, DMAE_PARAMS_SRC_VF_VALID, 0x1); in ecore_iov_copy_vf_msg()
4503 SET_FIELD(params.flags, DMAE_PARAMS_COMPLETION_DST, 0x1); in ecore_iov_copy_vf_msg()
H A Decore_init_ops.c186 SET_FIELD(params.flags, DMAE_PARAMS_RW_REPL_SRC, 0x1);
H A Decore_dev.c880 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE, eng_sel); in ecore_llh_set_ppfid_affinity()
933 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_ROCE, eng_sel); in ecore_llh_set_roce_affinity()
980 SET_FIELD(params.flags, DMAE_PARAMS_DST_PF_VALID, 0x1); in ecore_llh_access_filter()
986 SET_FIELD(params.flags, DMAE_PARAMS_SRC_PF_VALID, 0x1); in ecore_llh_access_filter()
987 SET_FIELD(params.flags, DMAE_PARAMS_COMPLETION_DST, 0x1); in ecore_llh_access_filter()
6255 SET_FIELD(p_coal_timeset->value, COALESCING_TIMESET_TIMESET, timeset); in ecore_set_coalesce()
6256 SET_FIELD(p_coal_timeset->value, COALESCING_TIMESET_VALID, 1); in ecore_set_coalesce()
H A Decore.h97 #define SET_FIELD(value, name, flag) \ macro
/f-stack/dpdk/drivers/raw/ifpga/base/
H A Dopae_ifpga_hw_api.h53 (SET_FIELD(PROP_TOP, _top) | SET_FIELD(PROP_SUB, _sub) |\
54 SET_FIELD(PROP_ID, _id))
H A Dopae_osdep.h53 #define SET_FIELD(m, v) (((v) << (__builtin_ffsll(m) - 1)) & (m)) macro
/f-stack/dpdk/drivers/net/qede/
H A Dqede_debug.c1854 SET_FIELD(dmae_params.flags, in qed_grc_dump_addr_range()
1861 SET_FIELD(dmae_params.flags, in qed_grc_dump_addr_range()
3616 SET_FIELD(reg_hdr->data, in qed_idle_chk_dump_failure()
3619 SET_FIELD(reg_hdr->data, in qed_idle_chk_dump_failure()
3678 SET_FIELD(reg_hdr->data, in qed_idle_chk_dump_failure()
5414 SET_FIELD(reg_result->data, in qed_dbg_read_attn()
5416 SET_FIELD(reg_result->data, in qed_dbg_read_attn()
5432 SET_FIELD(results->data, in qed_dbg_read_attn()
7786 SET_FIELD(res, REGDUMP_HEADER_SIZE, feature_size); in qed_calc_regdump_header()
7792 SET_FIELD(res, REGDUMP_HEADER_FEATURE, feature); in qed_calc_regdump_header()
[all …]
H A Dqede_rxtx.c865 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, in qede_tx_queue_start()
867 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, in qede_tx_queue_start()
869 SET_FIELD(txq->tx_db.data.params, in qede_tx_queue_start()