Searched refs:RTE_VECT_SIMD_128 (Results 1 – 16 of 16) sorted by relevance
118 if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in acl_check_alg_arm()122 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in acl_check_alg_arm()140 if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in acl_check_alg_ppc()197 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in acl_check_alg_x86()
207 max_simd_bitwidth >= RTE_VECT_SIMD_128) in sse42_pclmulqdq_get_handlers()233 max_simd_bitwidth >= RTE_VECT_SIMD_128) in neon_pmull_get_handlers()
195 RTE_VECT_SIMD_128 = 128, enumerator
218 if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in ip4_lookup_node_init()
568 if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) in mlx5_check_vec_rx_support()
766 if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in rte_distributor_create()
662 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) in rte_efd_create()
562 rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) in axgbe_dev_tx_queue_setup()
2944 rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) { in fm10k_set_tx_function()2964 rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) in fm10k_set_tx_function()2999 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in fm10k_set_rx_function()
2321 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in iavf_set_rx_function()2427 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in iavf_set_tx_function()
2411 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128 && in ixgbe_dev_tx_done_cleanup()2510 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128 && in ixgbe_set_tx_function()4753 rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) { in ixgbe_set_rx_function()
3161 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in i40e_set_rx_function()3321 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in i40e_set_tx_function()
3025 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in ice_set_rx_function()3241 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in ice_set_tx_function()
1181 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in bnxt_receive_function()1215 rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { in bnxt_transmit_function()
2371 if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128) { in virtio_dev_configure()
511 RTE_VECT_SIMD_128 = 128,