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Searched refs:RD1 (Results 1 – 13 of 13) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dmax77620.c259 rv = RD1(sc, MAX77620_REG_CID0 + i , buf + i); in max77620_get_version()
344 RD1(sc, MAX77620_REG_INTENLBT, &intenlbt); in max77620_intr()
345 RD1(sc, MAX77620_REG_INTLBT, &intlbt); in max77620_intr()
347 RD1(sc, MAX77620_REG_IRQTOP, &irqtop); in max77620_intr()
348 RD1(sc, MAX77620_REG_IRQTOPM, &irqtopm); in max77620_intr()
349 RD1(sc, MAX77620_REG_IRQSD, &irqsd); in max77620_intr()
350 RD1(sc, MAX77620_REG_IRQMASKSD, &irqmasksd); in max77620_intr()
353 RD1(sc, MAX77620_REG_IRQ_LVL2_L8, &irq_lvl2_l8); in max77620_intr()
354 RD1(sc, MAX77620_REG_IRQ_MSK_L8, &irq_msk_l8); in max77620_intr()
356 RD1(sc, MAX77620_REG_ONOFFIRQ, &onoffirq); in max77620_intr()
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H A Dmax77620_gpio.c214 rv = RD1(sc, pin->reg, &reg); in max77620_pinmux_config_node()
449 rv = RD1(sc, pin->reg, &reg); in max77620_gpio_get_mode()
530 rv = RD1(sc, pin->reg, &reg); in max77620_gpio_pin_setflags()
621 rv = RD1(sc, sc->gpio_pins[pin]->reg, &tmp); in max77620_gpio_pin_get()
646 rv = RD1(sc, sc->gpio_pins[pin]->reg, &tmp); in max77620_gpio_pin_toggle()
682 rv = RD1(sc, MAX77620_REG_PUE_GPIO, &sc->gpio_reg_pue); in max77620_gpio_attach()
688 rv = RD1(sc, MAX77620_REG_PDE_GPIO, &sc->gpio_reg_pde); in max77620_gpio_attach()
694 rv = RD1(sc, MAX77620_REG_AME_GPIO, &sc->gpio_reg_ame); in max77620_gpio_attach()
H A Dmax77620_regulators.c368 rv = RD1(sc->base_sc, sc->def->volt_reg, sel); in max77620_get_sel()
403 rv = RD1(sc->base_sc, sc->def->fps_reg, &val); in max77620_get_fps_src()
463 rv = RD1(sc->base_sc, sc->def->pwr_mode_reg, &val); in max77620_get_pwr_mode()
490 rv = RD1(sc->base_sc, sc->def->cfg_reg, &val); in max77620_get_pwr_ramp_delay()
560 RD1(sc->base_sc, sc->def->volt_reg, &val1); in max77620_regnode_init()
561 RD1(sc->base_sc, sc->def->cfg_reg, &val2); in max77620_regnode_init()
562 RD1(sc->base_sc, sc->def->fps_reg, &val3); in max77620_regnode_init()
H A Dmax77620.h226 #define RD1(sc, reg, val) max77620_read(sc, reg, val) macro
/f-stack/freebsd/arm/nvidia/
H A Das3722_gpio.c493 rv = RD1(sc, AS3722_GPIO_SIGNAL_OUT, &tmp); in as3722_gpio_pin_get()
495 rv = RD1(sc, AS3722_GPIO_SIGNAL_IN, &tmp); in as3722_gpio_pin_get()
518 rv = RD1(sc, AS3722_GPIO_SIGNAL_OUT, &tmp); in as3722_gpio_pin_toggle()
564 rv = RD1(sc, AS3722_GPIO0_CONTROL + i, &pin->pin_ctrl_reg); in as3722_gpio_attach()
H A Das3722.c199 rv = RD1(sc, AS3722_ASIC_ID1, &reg); in as3722_get_version()
208 rv = RD1(sc, AS3722_ASIC_ID2, &sc->chip_rev); in as3722_get_version()
H A Das3722.h285 #define RD1(sc, reg, val) as3722_read(sc, reg, val) macro
H A Das3722_regulators.c392 rv = RD1(sc->base_sc, sc->def->volt_reg, sel); in as3722_read_sel()
421 rv = RD1(sc->base_sc, AS3722_FUSE7, &val); in as3722_sd0_is_low_voltage()
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dsama5d3_gmac.dtsi43 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
53 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
H A Dsama5d3.dtsi885 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
H A Dsama5d4.dtsi1335 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
/f-stack/freebsd/arm/allwinner/
H A Daw_sid.c235 #define RD1(sc, reg) bus_read_1((sc)->res, (reg)) macro
/f-stack/freebsd/arm/broadcom/bcm2835/
H A Dbcm2835_sdhost.c264 RD1(struct bcm_sdhost_softc *sc, bus_size_t off) in RD1() function
829 val1 = RD1(sc, HC_POWER); in bcm_sdhost_read_1()