Home
last modified time | relevance | path

Searched refs:R0 (Results 1 – 19 of 19) sorted by relevance

/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dmediatek,mt6779-pinctrl.yaml113 Pull up setings for 2 pull resistors, R0 and R1. User can
115 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
116 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
117 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
118 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
124 Pull down settings for 2 pull resistors, R0 and R1. User can
126 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
127 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
128 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
129 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
H A Dpinctrl-mt65xx.txt65 Some special pins have extra pull up strength, there are R0 and R1 pull-up
H A Dpinctrl-mt8183.txt49 Some special pins have extra pull up strength, there are R0 and R1 pull-up
/f-stack/app/redis-5.0.5/src/
H A Dsha1.c47 #define R0(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk0(i)+0x5A827999+rol(v,5);w=rol(w,30); macro
81 R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); in SHA1Transform()
82 R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); in SHA1Transform()
83 R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11); in SHA1Transform()
84 R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15); in SHA1Transform()
/f-stack/dpdk/doc/guides/prog_guide/
H A Dbpf_lib.rst38 Register ``R0`` is an implicit output which contains the data fetched from the
51 R0 = rte_pktmbuf_read((const struct rte_mbuf *)R6, src_reg + imm32,
53 if (R0 == NULL) return FAILED;
54 R0 = ntohl(*(uint32_t *)R0);
/f-stack/freebsd/arm/include/
H A Dcpu-v6.h311 _R64F0(cp15_cntpct_get, CP15_CNTPCT(%Q0, %R0)) in _WF0()
312 _R64F0(cp15_cntvct_get, CP15_CNTVCT(%Q0, %R0)) in _WF0()
313 _R64F0(cp15_cntp_cval_get, CP15_CNTP_CVAL(%Q0, %R0)) in _WF0()
314 _W64F1(cp15_cntp_cval_set, CP15_CNTP_CVAL(%Q0, %R0)) in _WF0()
315 _R64F0(cp15_cntv_cval_get, CP15_CNTV_CVAL(%Q0, %R0)) in _WF0()
316 _W64F1(cp15_cntv_cval_set, CP15_CNTV_CVAL(%Q0, %R0)) in _WF0()
317 _R64F0(cp15_cntvoff_get, CP15_CNTVOFF(%Q0, %R0)) in _WF0()
318 _W64F1(cp15_cntvoff_set, CP15_CNTVOFF(%Q0, %R0)) in _WF0()
319 _R64F0(cp15_cnthp_cval_get, CP15_CNTHP_CVAL(%Q0, %R0)) in _WF0()
320 _W64F1(cp15_cnthp_cval_set, CP15_CNTHP_CVAL(%Q0, %R0)) in _WF0()
/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Djuno,scpi.txt22 For Juno R0 and Juno R1 refer to [1] for the
/f-stack/freebsd/contrib/device-tree/Bindings/display/
H A Darm,pl11x.txt51 as R0 (first bit of the red component), second value
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Daspeed-bmc-opp-romulus.dts253 /*R0-R7*/ "","","fsi-trans","","","led-power","","",
H A Daspeed-bmc-opp-nicole.dts237 /*R0-R7*/ "","software_pwrgood","","","","","","",
H A Daspeed-bmc-facebook-tiogapass.dts163 /*R0-R7*/ "","","BMC_TCK_MUX_SEL","BMC_PRDY",
H A Daspeed-bmc-opp-witherspoon.dts220 /*R0-R7*/ "","","fsi-trans","","","power-button","","",
H A Daspeed-bmc-opp-zaius.dts501 /*R0-R7*/ "","","","","","","","",
H A Daspeed-bmc-opp-tacoma.dts121 /*R0-R7*/ "","","","","","","","",
H A Daspeed-bmc-ibm-rainier.dts148 /*R0-R7*/ "","","","","","","","",
/f-stack/freebsd/contrib/device-tree/Bindings/display/panel/
H A Dpanel-simple.yaml142 # InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT LCD panel
/f-stack/dpdk/doc/guides/nics/
H A Dpcap_ring.rst290 ring[0] = rte_ring_create("R0", RING_SIZE, SOCKET0, RING_F_SP_ENQ|RING_F_SC_DEQ);
/f-stack/freebsd/contrib/edk2/Include/Library/
H A DBaseLib.h67 UINT64 R0; member
/f-stack/freebsd/crypto/openssl/arm/
H A Dpoly1305-armv4.S488 @ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,