Searched refs:QCA955X_DDR_REG_FLUSH_GE0 (Results 1 – 2 of 2) sorted by relevance
208 #define QCA955X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c) macro
215 ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_GE0); in qca955x_chip_ddr_flush()