Searched refs:QCA953X_DDR_REG_FLUSH_GE0 (Results 1 – 2 of 2) sorted by relevance
140 #define QCA953X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c) macro
214 ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE0); in qca953x_chip_ddr_flush()