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Searched refs:PLLE_SS_CNTL_SSCBYP (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_car.h63 #define PLLE_SS_CNTL_SSCBYP (1 << 12) macro
70 PLLE_SS_CNTL_SSCBYP)
H A Dtegra124_clk_pll.c612 reg &= ~PLLE_SS_CNTL_SSCBYP; in plle_enable()
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_car.h67 #define PLLE_SS_CNTL_SSCBYP (1 << 12) macro
80 PLLE_SS_CNTL_SSCBYP)
H A Dtegra210_clk_pll.c807 reg &= ~PLLE_SS_CNTL_SSCBYP; in plle_enable()