xref: /f-stack/freebsd/mips/include/mips_opcode.h (revision 22ce4aff)
1 /*	$OpenBSD: mips_opcode.h,v 1.2 1999/01/27 04:46:05 imp Exp $	*/
2 
3 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This code is derived from software contributed to Berkeley by
10  * Ralph Campbell.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *	from: @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93
37  *	JNPR: mips_opcode.h,v 1.1 2006/08/07 05:38:57 katta
38  * $FreeBSD$
39  */
40 
41 #ifndef _MACHINE_MIPS_OPCODE_H_
42 #define	_MACHINE_MIPS_OPCODE_H_
43 
44 /*
45  * Define the instruction formats and opcode values for the
46  * MIPS instruction set.
47  */
48 #include <machine/endian.h>
49 
50 /*
51  * Define the instruction formats.
52  */
53 typedef union {
54 	unsigned word;
55 
56 #if BYTE_ORDER == BIG_ENDIAN
57 	struct {
58 		unsigned op: 6;
59 		unsigned rs: 5;
60 		unsigned rt: 5;
61 		unsigned imm: 16;
62 	} IType;
63 
64 	struct {
65 		unsigned op: 6;
66 		unsigned target: 26;
67 	} JType;
68 
69 	struct {
70 		unsigned op: 6;
71 		unsigned rs: 5;
72 		unsigned rt: 5;
73 		unsigned rd: 5;
74 		unsigned shamt: 5;
75 		unsigned func: 6;
76 	} RType;
77 
78 	struct {
79 		unsigned op: 6;		/* always '0x11' */
80 		unsigned : 1;		/* always '1' */
81 		unsigned fmt: 4;
82 		unsigned ft: 5;
83 		unsigned fs: 5;
84 		unsigned fd: 5;
85 		unsigned func: 6;
86 	} FRType;
87 #endif
88 #if BYTE_ORDER == LITTLE_ENDIAN
89 	struct {
90 		unsigned imm: 16;
91 		unsigned rt: 5;
92 		unsigned rs: 5;
93 		unsigned op: 6;
94 	} IType;
95 
96 	struct {
97 		unsigned target: 26;
98 		unsigned op: 6;
99 	} JType;
100 
101 	struct {
102 		unsigned func: 6;
103 		unsigned shamt: 5;
104 		unsigned rd: 5;
105 		unsigned rt: 5;
106 		unsigned rs: 5;
107 		unsigned op: 6;
108 	} RType;
109 
110 	struct {
111 		unsigned func: 6;
112 		unsigned fd: 5;
113 		unsigned fs: 5;
114 		unsigned ft: 5;
115 		unsigned fmt: 4;
116 		unsigned : 1;		/* always '1' */
117 		unsigned op: 6;		/* always '0x11' */
118 	} FRType;
119 #endif
120 } InstFmt;
121 
122 /* instruction field decoding macros */
123 #define	MIPS_INST_OPCODE(val)	(val >> 26)
124 #define	MIPS_INST_RS(val)	((val & 0x03e00000) >> 21)
125 #define	MIPS_INST_RT(val)	((val & 0x001f0000) >> 16)
126 #define	MIPS_INST_IMM(val)	((val & 0x0000ffff))
127 
128 #define	MIPS_INST_RD(val)	((val & 0x0000f800) >> 11)
129 #define	MIPS_INST_SA(val)	((val & 0x000007c0) >> 6)
130 #define	MIPS_INST_FUNC(val)	(val & 0x0000003f)
131 
132 #define	MIPS_INST_INDEX(val)	(val & 0x03ffffff)
133 
134 /*
135  * the mips opcode and function table use a 3bit row and 3bit col
136  * number we define the following macro for easy transcribing
137  */
138 
139 #define	MIPS_OPCODE(r, c)	(((r & 0x07) << 3) | (c & 0x07))
140 
141 /*
142  * Values for the 'op' field.
143  */
144 #define	OP_SPECIAL	000
145 #define	OP_BCOND	001
146 #define	OP_J		002
147 #define	OP_JAL		003
148 #define	OP_BEQ		004
149 #define	OP_BNE		005
150 #define	OP_BLEZ		006
151 #define	OP_BGTZ		007
152 
153 #define	OP_REGIMM	OP_BCOND
154 
155 #define	OP_ADDI		010
156 #define	OP_ADDIU	011
157 #define	OP_SLTI		012
158 #define	OP_SLTIU	013
159 #define	OP_ANDI		014
160 #define	OP_ORI		015
161 #define	OP_XORI		016
162 #define	OP_LUI		017
163 
164 #define	OP_COP0		020
165 #define	OP_COP1		021
166 #define	OP_COP2		022
167 #define	OP_COP3		023
168 #define	OP_BEQL		024
169 #define	OP_BNEL		025
170 #define	OP_BLEZL	026
171 #define	OP_BGTZL	027
172 
173 #define	OP_COP1X	OP_COP3
174 
175 #define	OP_DADDI	030
176 #define	OP_DADDIU	031
177 #define	OP_LDL		032
178 #define	OP_LDR		033
179 
180 #define OP_SPECIAL2	034
181 #define OP_JALX		035
182 
183 #define OP_SPECIAL3	037
184 
185 #define	OP_LB		040
186 #define	OP_LH		041
187 #define	OP_LWL		042
188 #define	OP_LW		043
189 #define	OP_LBU		044
190 #define	OP_LHU		045
191 #define	OP_LWR		046
192 #define	OP_LWU		047
193 
194 #define	OP_SB		050
195 #define	OP_SH		051
196 #define	OP_SWL		052
197 #define	OP_SW		053
198 #define	OP_SDL		054
199 #define	OP_SDR		055
200 #define	OP_SWR		056
201 #define	OP_CACHE	057
202 
203 #define	OP_LL		060
204 #define	OP_LWC1		061
205 #define	OP_LWC2		062
206 #define	OP_LWC3		063
207 #define	OP_LLD		064
208 #define	OP_LDC1		065
209 #define	OP_LDC2		066
210 #define	OP_LD		067
211 
212 #define	OP_PREF		OP_LWC3
213 
214 #define	OP_SC		070
215 #define	OP_SWC1		071
216 #define	OP_SWC2		072
217 #define	OP_SWC3		073
218 #define	OP_SCD		074
219 #define	OP_SDC1		075
220 #define	OP_SDC2		076
221 #define	OP_SD		077
222 
223 /*
224  * Values for the 'func' field when 'op' == OP_SPECIAL.
225  */
226 #define	OP_SLL		000
227 #define	OP_MOVCI	001
228 #define	OP_SRL		002
229 #define	OP_SRA		003
230 #define	OP_SLLV		004
231 #define	OP_SRLV		006
232 #define	OP_SRAV		007
233 
234 #define	OP_F_SLL	OP_SLL
235 #define	OP_F_MOVCI	OP_MOVCI
236 #define	OP_F_SRL	OP_SRL
237 #define	OP_F_SRA	OP_SRA
238 #define	OP_F_SLLV	OP_SLLV
239 #define	OP_F_SRLV	OP_SRLV
240 #define	OP_F_SRAV	OP_SRAV
241 
242 #define	OP_JR		010
243 #define	OP_JALR		011
244 #define	OP_MOVZ		012
245 #define	OP_MOVN		013
246 #define	OP_SYSCALL	014
247 #define	OP_BREAK	015
248 #define	OP_SYNC		017
249 
250 #define	OP_F_JR		OP_JR
251 #define	OP_F_JALR	OP_JALR
252 #define	OP_F_MOVZ	OP_MOVZ
253 #define	OP_F_MOVN	OP_MOVN
254 #define	OP_F_SYSCALL	OP_SYSCALL
255 #define	OP_F_BREAK	OP_BREAK
256 #define	OP_F_SYNC	OP_SYNC
257 
258 #define	OP_MFHI		020
259 #define	OP_MTHI		021
260 #define	OP_MFLO		022
261 #define	OP_MTLO		023
262 #define	OP_DSLLV	024
263 #define	OP_DSRLV	026
264 #define	OP_DSRAV	027
265 
266 #define	OP_F_MFHI	OP_MFHI
267 #define	OP_F_MTHI	OP_MTHI
268 #define	OP_F_MFLO	OP_MFLO
269 #define	OP_F_MTLO	OP_MTLO
270 #define	OP_F_DSLLV	OP_DSLLV
271 #define	OP_F_DSRLV	OP_DSRLV
272 #define	OP_F_DSRAV	OP_DSRAV
273 
274 #define	OP_MULT		030
275 #define	OP_MULTU	031
276 #define	OP_DIV		032
277 #define	OP_DIVU		033
278 #define	OP_DMULT	034
279 #define	OP_DMULTU	035
280 #define	OP_DDIV		036
281 #define	OP_DDIVU	037
282 
283 #define	OP_F_MULT	OP_MULT
284 #define	OP_F_MULTU	OP_MULTU
285 #define	OP_F_DIV	OP_DIV
286 #define	OP_F_DIVU	OP_DIVU
287 #define	OP_F_DMULT	OP_DMULT
288 #define	OP_F_DMULTU	OP_DMULTU
289 #define	OP_F_DDIV	OP_DDIV
290 #define	OP_F_DDIVU	OP_DDIVU
291 
292 #define	OP_ADD		040
293 #define	OP_ADDU		041
294 #define	OP_SUB		042
295 #define	OP_SUBU		043
296 #define	OP_AND		044
297 #define	OP_OR		045
298 #define	OP_XOR		046
299 #define	OP_NOR		047
300 
301 #define	OP_F_ADD	OP_ADD
302 #define	OP_F_ADDU	OP_ADDU
303 #define	OP_F_SUB	OP_SUB
304 #define	OP_F_SUBU	OP_SUBU
305 #define	OP_F_AND	OP_AND
306 #define	OP_F_OR		OP_OR
307 #define	OP_F_XOR	OP_XOR
308 #define	OP_F_NOR	OP_NOR
309 
310 #define	OP_SLT		052
311 #define	OP_SLTU		053
312 #define	OP_DADD		054
313 #define	OP_DADDU	055
314 #define	OP_DSUB		056
315 #define	OP_DSUBU	057
316 
317 #define	OP_F_SLT	OP_SLT
318 #define	OP_F_SLTU	OP_SLTU
319 #define	OP_F_DADD	OP_DADD
320 #define	OP_F_DADDU	OP_DADDU
321 #define	OP_F_DSUB	OP_DSUB
322 #define	OP_F_DSUBU	OP_DSUBU
323 
324 #define	OP_TGE		060
325 #define	OP_TGEU		061
326 #define	OP_TLT		062
327 #define	OP_TLTU		063
328 #define	OP_TEQ		064
329 #define	OP_TNE		066
330 
331 #define	OP_F_TGE	OP_TGE
332 #define	OP_F_TGEU	OP_TGEU
333 #define	OP_F_TLT	OP_TLT
334 #define	OP_F_TLTU	OP_TLTU
335 #define	OP_F_TEQ	OP_TEQ
336 #define	OP_F_TNE	OP_TNE
337 
338 #define	OP_DSLL		070
339 #define	OP_DSRL		072
340 #define	OP_DSRA		073
341 #define	OP_DSLL32	074
342 #define	OP_DSRL32	076
343 #define	OP_DSRA32	077
344 
345 #define	OP_F_DSLL	OP_DSLL
346 #define	OP_F_DSRL	OP_DSRL
347 #define	OP_F_DSRA	OP_DSRA
348 #define	OP_F_DSLL32	OP_DSLL32
349 #define	OP_F_DSRL32	OP_DSRL32
350 #define	OP_F_DSRA32	OP_DSRA32
351 
352 /*
353  * The REGIMM - register immediate instructions are further
354  * decoded using this table that has 2bit row numbers, hence
355  * a need for a new helper macro.
356  */
357 
358 #define	MIPS_ROP(r, c)	((r & 0x03) << 3) | (c & 0x07)
359 
360 /*
361  * Values for the 'func' field when 'op' == OP_BCOND.
362  */
363 #define	OP_BLTZ		000
364 #define	OP_BGEZ		001
365 #define	OP_BLTZL	002
366 #define	OP_BGEZL	003
367 
368 #define	OP_R_BLTZ	OP_BLTZ
369 #define	OP_R_BGEZ	OP_BGEZ
370 #define	OP_R_BLTZL	OP_BLTZL
371 #define	OP_R_BGEZL	OP_BGEZL
372 
373 #define	OP_TGEI		010
374 #define	OP_TGEIU	011
375 #define	OP_TLTI		012
376 #define	OP_TLTIU	013
377 #define	OP_TEQI		014
378 #define	OP_TNEI		016
379 
380 #define	OP_R_TGEI	OP_TGEI
381 #define	OP_R_TGEIU	OP_TGEIU
382 #define	OP_R_TLTI	OP_TLTI
383 #define	OP_R_TLTIU	OP_TLTIU
384 #define	OP_R_TEQI	OP_TEQI
385 #define	OP_R_TNEI	OP_TNEI
386 
387 #define	OP_BLTZAL	020
388 #define	OP_BGEZAL	021
389 #define	OP_BLTZALL	022
390 #define	OP_BGEZALL	023
391 
392 #define	OP_R_BLTZAL	OP_BLTZAL
393 #define	OP_R_BGEZAL	OP_BGEZAL
394 #define	OP_R_BLTZALL	OP_BLTZALL
395 #define	OP_R_BGEZALL	OP_BGEZALL
396 
397 /*
398  * Values for the 'func' field when 'op' == OP_SPECIAL3.
399  */
400 #define	OP_RDHWR	073
401 
402 /*
403  * Values for the 'rs' field when 'op' == OP_COPz.
404  */
405 #define	OP_MF		000
406 #define	OP_DMF		001
407 #define	OP_MT		004
408 #define	OP_DMT		005
409 #define	OP_BCx		010
410 #define	OP_BCy		014
411 #define	OP_CF		002
412 #define	OP_CT		006
413 
414 /*
415  * Values for the 'rt' field when 'op' == OP_COPz.
416  */
417 #define	COPz_BC_TF_MASK		0x01
418 #define	COPz_BC_TRUE		0x01
419 #define	COPz_BC_FALSE		0x00
420 #define	COPz_BCL_TF_MASK	0x02
421 #define	COPz_BCL_TRUE		0x02
422 #define	COPz_BCL_FALSE		0x00
423 
424 #endif /* !_MACHINE_MIPS_OPCODE_H_ */
425