1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(C) 2019 Marvell International Ltd. 3 */ 4 5 #ifndef __OTX2_NPC_HW_H__ 6 #define __OTX2_NPC_HW_H__ 7 8 /* Register offsets */ 9 10 #define NPC_AF_CFG (0x0ull) 11 #define NPC_AF_ACTIVE_PC (0x10ull) 12 #define NPC_AF_CONST (0x20ull) 13 #define NPC_AF_CONST1 (0x30ull) 14 #define NPC_AF_BLK_RST (0x40ull) 15 #define NPC_AF_MCAM_SCRUB_CTL (0xa0ull) 16 #define NPC_AF_KCAM_SCRUB_CTL (0xb0ull) 17 #define NPC_AF_KPUX_CFG(a) \ 18 (0x500ull | (uint64_t)(a) << 3) 19 #define NPC_AF_PCK_CFG (0x600ull) 20 #define NPC_AF_PCK_DEF_OL2 (0x610ull) 21 #define NPC_AF_PCK_DEF_OIP4 (0x620ull) 22 #define NPC_AF_PCK_DEF_OIP6 (0x630ull) 23 #define NPC_AF_PCK_DEF_IIP4 (0x640ull) 24 #define NPC_AF_KEX_LDATAX_FLAGS_CFG(a) \ 25 (0x800ull | (uint64_t)(a) << 3) 26 #define NPC_AF_INTFX_KEX_CFG(a) \ 27 (0x1010ull | (uint64_t)(a) << 8) 28 #define NPC_AF_PKINDX_ACTION0(a) \ 29 (0x80000ull | (uint64_t)(a) << 6) 30 #define NPC_AF_PKINDX_ACTION1(a) \ 31 (0x80008ull | (uint64_t)(a) << 6) 32 #define NPC_AF_PKINDX_CPI_DEFX(a, b) \ 33 (0x80020ull | (uint64_t)(a) << 6 | (uint64_t)(b) << 3) 34 #define NPC_AF_CHLEN90B_PKIND (0x3bull) 35 #define NPC_AF_KPUX_ENTRYX_CAMX(a, b, c) \ 36 (0x100000ull | (uint64_t)(a) << 14 | (uint64_t)(b) << 6 | \ 37 (uint64_t)(c) << 3) 38 #define NPC_AF_KPUX_ENTRYX_ACTION0(a, b) \ 39 (0x100020ull | (uint64_t)(a) << 14 | (uint64_t)(b) << 6) 40 #define NPC_AF_KPUX_ENTRYX_ACTION1(a, b) \ 41 (0x100028ull | (uint64_t)(a) << 14 | (uint64_t)(b) << 6) 42 #define NPC_AF_KPUX_ENTRY_DISX(a, b) \ 43 (0x180000ull | (uint64_t)(a) << 6 | (uint64_t)(b) << 3) 44 #define NPC_AF_CPIX_CFG(a) \ 45 (0x200000ull | (uint64_t)(a) << 3) 46 #define NPC_AF_INTFX_LIDX_LTX_LDX_CFG(a, b, c, d) \ 47 (0x900000ull | (uint64_t)(a) << 16 | (uint64_t)(b) << 12 | \ 48 (uint64_t)(c) << 5 | (uint64_t)(d) << 3) 49 #define NPC_AF_INTFX_LDATAX_FLAGSX_CFG(a, b, c) \ 50 (0x980000ull | (uint64_t)(a) << 16 | (uint64_t)(b) << 12 | \ 51 (uint64_t)(c) << 3) 52 #define NPC_AF_MCAMEX_BANKX_CAMX_INTF(a, b, c) \ 53 (0x1000000ull | (uint64_t)(a) << 10 | (uint64_t)(b) << 6 | \ 54 (uint64_t)(c) << 3) 55 #define NPC_AF_MCAMEX_BANKX_CAMX_W0(a, b, c) \ 56 (0x1000010ull | (uint64_t)(a) << 10 | (uint64_t)(b) << 6 | \ 57 (uint64_t)(c) << 3) 58 #define NPC_AF_MCAMEX_BANKX_CAMX_W1(a, b, c) \ 59 (0x1000020ull | (uint64_t)(a) << 10 | (uint64_t)(b) << 6 | \ 60 (uint64_t)(c) << 3) 61 #define NPC_AF_MCAMEX_BANKX_CFG(a, b) \ 62 (0x1800000ull | (uint64_t)(a) << 8 | (uint64_t)(b) << 4) 63 #define NPC_AF_MCAMEX_BANKX_STAT_ACT(a, b) \ 64 (0x1880000ull | (uint64_t)(a) << 8 | (uint64_t)(b) << 4) 65 #define NPC_AF_MATCH_STATX(a) \ 66 (0x1880008ull | (uint64_t)(a) << 8) 67 #define NPC_AF_INTFX_MISS_STAT_ACT(a) \ 68 (0x1880040ull + (uint64_t)(a) * 0x8) 69 #define NPC_AF_MCAMEX_BANKX_ACTION(a, b) \ 70 (0x1900000ull | (uint64_t)(a) << 8 | (uint64_t)(b) << 4) 71 #define NPC_AF_MCAMEX_BANKX_TAG_ACT(a, b) \ 72 (0x1900008ull | (uint64_t)(a) << 8 | (uint64_t)(b) << 4) 73 #define NPC_AF_INTFX_MISS_ACT(a) \ 74 (0x1a00000ull | (uint64_t)(a) << 4) 75 #define NPC_AF_INTFX_MISS_TAG_ACT(a) \ 76 (0x1b00008ull | (uint64_t)(a) << 4) 77 #define NPC_AF_MCAM_BANKX_HITX(a, b) \ 78 (0x1c80000ull | (uint64_t)(a) << 8 | (uint64_t)(b) << 4) 79 #define NPC_AF_LKUP_CTL (0x2000000ull) 80 #define NPC_AF_LKUP_DATAX(a) \ 81 (0x2000200ull | (uint64_t)(a) << 4) 82 #define NPC_AF_LKUP_RESULTX(a) \ 83 (0x2000400ull | (uint64_t)(a) << 4) 84 #define NPC_AF_INTFX_STAT(a) \ 85 (0x2000800ull | (uint64_t)(a) << 4) 86 #define NPC_AF_DBG_CTL (0x3000000ull) 87 #define NPC_AF_DBG_STATUS (0x3000010ull) 88 #define NPC_AF_KPUX_DBG(a) \ 89 (0x3000020ull | (uint64_t)(a) << 8) 90 #define NPC_AF_IKPU_ERR_CTL (0x3000080ull) 91 #define NPC_AF_KPUX_ERR_CTL(a) \ 92 (0x30000a0ull | (uint64_t)(a) << 8) 93 #define NPC_AF_MCAM_DBG (0x3001000ull) 94 #define NPC_AF_DBG_DATAX(a) \ 95 (0x3001400ull | (uint64_t)(a) << 4) 96 #define NPC_AF_DBG_RESULTX(a) \ 97 (0x3001800ull | (uint64_t)(a) << 4) 98 99 100 /* Enum offsets */ 101 102 #define NPC_INTF_NIX0_RX (0x0ull) 103 #define NPC_INTF_NIX0_TX (0x1ull) 104 105 #define NPC_LKUPOP_PKT (0x0ull) 106 #define NPC_LKUPOP_KEY (0x1ull) 107 108 #define NPC_MCAM_KEY_X1 (0x0ull) 109 #define NPC_MCAM_KEY_X2 (0x1ull) 110 #define NPC_MCAM_KEY_X4 (0x2ull) 111 112 enum NPC_ERRLEV_E { 113 NPC_ERRLEV_RE = 0, 114 NPC_ERRLEV_LA = 1, 115 NPC_ERRLEV_LB = 2, 116 NPC_ERRLEV_LC = 3, 117 NPC_ERRLEV_LD = 4, 118 NPC_ERRLEV_LE = 5, 119 NPC_ERRLEV_LF = 6, 120 NPC_ERRLEV_LG = 7, 121 NPC_ERRLEV_LH = 8, 122 NPC_ERRLEV_R9 = 9, 123 NPC_ERRLEV_R10 = 10, 124 NPC_ERRLEV_R11 = 11, 125 NPC_ERRLEV_R12 = 12, 126 NPC_ERRLEV_R13 = 13, 127 NPC_ERRLEV_R14 = 14, 128 NPC_ERRLEV_NIX = 15, 129 NPC_ERRLEV_ENUM_LAST = 16, 130 }; 131 132 enum npc_kpu_err_code { 133 NPC_EC_NOERR = 0, /* has to be zero */ 134 NPC_EC_UNK, 135 NPC_EC_IH_LENGTH, 136 NPC_EC_EDSA_UNK, 137 NPC_EC_L2_K1, 138 NPC_EC_L2_K2, 139 NPC_EC_L2_K3, 140 NPC_EC_L2_K3_ETYPE_UNK, 141 NPC_EC_L2_K4, 142 NPC_EC_MPLS_2MANY, 143 NPC_EC_MPLS_UNK, 144 NPC_EC_NSH_UNK, 145 NPC_EC_IP_TTL_0, 146 NPC_EC_IP_FRAG_OFFSET_1, 147 NPC_EC_IP_VER, 148 NPC_EC_IP6_HOP_0, 149 NPC_EC_IP6_VER, 150 NPC_EC_TCP_FLAGS_FIN_ONLY, 151 NPC_EC_TCP_FLAGS_ZERO, 152 NPC_EC_TCP_FLAGS_RST_FIN, 153 NPC_EC_TCP_FLAGS_URG_SYN, 154 NPC_EC_TCP_FLAGS_RST_SYN, 155 NPC_EC_TCP_FLAGS_SYN_FIN, 156 NPC_EC_VXLAN, 157 NPC_EC_NVGRE, 158 NPC_EC_GRE, 159 NPC_EC_GRE_VER1, 160 NPC_EC_L4, 161 NPC_EC_OIP4_CSUM, 162 NPC_EC_IIP4_CSUM, 163 NPC_EC_LAST /* has to be the last item */ 164 }; 165 166 enum NPC_LID_E { 167 NPC_LID_LA = 0, 168 NPC_LID_LB, 169 NPC_LID_LC, 170 NPC_LID_LD, 171 NPC_LID_LE, 172 NPC_LID_LF, 173 NPC_LID_LG, 174 NPC_LID_LH, 175 }; 176 177 #define NPC_LT_NA 0 178 179 enum npc_kpu_la_ltype { 180 NPC_LT_LA_8023 = 1, 181 NPC_LT_LA_ETHER, 182 NPC_LT_LA_IH_NIX_ETHER, 183 NPC_LT_LA_IH_8_ETHER, 184 NPC_LT_LA_IH_4_ETHER, 185 NPC_LT_LA_IH_2_ETHER, 186 NPC_LT_LA_HIGIG2_ETHER, 187 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 188 NPC_LT_LA_CH_LEN_90B_ETHER, /* Custom L2 header of length 90 bytes */ 189 }; 190 191 enum npc_kpu_lb_ltype { 192 NPC_LT_LB_ETAG = 1, 193 NPC_LT_LB_CTAG, 194 NPC_LT_LB_STAG_QINQ, 195 NPC_LT_LB_BTAG, 196 NPC_LT_LB_ITAG, 197 NPC_LT_LB_DSA, 198 NPC_LT_LB_DSA_VLAN, 199 NPC_LT_LB_EDSA, 200 NPC_LT_LB_EDSA_VLAN, 201 NPC_LT_LB_EXDSA, 202 NPC_LT_LB_EXDSA_VLAN, 203 }; 204 205 enum npc_kpu_lc_ltype { 206 NPC_LT_LC_PTP = 1, 207 NPC_LT_LC_IP, 208 NPC_LT_LC_IP_OPT, 209 NPC_LT_LC_IP6, 210 NPC_LT_LC_IP6_EXT, 211 NPC_LT_LC_ARP, 212 NPC_LT_LC_RARP, 213 NPC_LT_LC_MPLS, 214 NPC_LT_LC_NSH, 215 NPC_LT_LC_FCOE, 216 }; 217 218 /* Don't modify Ltypes up to SCTP, otherwise it will 219 * effect flow tag calculation and thus RSS. 220 */ 221 enum npc_kpu_ld_ltype { 222 NPC_LT_LD_TCP = 1, 223 NPC_LT_LD_UDP, 224 NPC_LT_LD_ICMP, 225 NPC_LT_LD_SCTP, 226 NPC_LT_LD_ICMP6, 227 NPC_LT_LD_IGMP = 8, 228 NPC_LT_LD_AH, 229 NPC_LT_LD_GRE, 230 NPC_LT_LD_NVGRE, 231 NPC_LT_LD_NSH, 232 NPC_LT_LD_TU_MPLS_IN_NSH, 233 NPC_LT_LD_TU_MPLS_IN_IP, 234 }; 235 236 enum npc_kpu_le_ltype { 237 NPC_LT_LE_VXLAN = 1, 238 NPC_LT_LE_GENEVE, 239 NPC_LT_LE_ESP, 240 NPC_LT_LE_GTPU = 4, 241 NPC_LT_LE_VXLANGPE, 242 NPC_LT_LE_GTPC, 243 NPC_LT_LE_NSH, 244 NPC_LT_LE_TU_MPLS_IN_GRE, 245 NPC_LT_LE_TU_NSH_IN_GRE, 246 NPC_LT_LE_TU_MPLS_IN_UDP, 247 }; 248 249 enum npc_kpu_lf_ltype { 250 NPC_LT_LF_TU_ETHER = 1, 251 NPC_LT_LF_TU_PPP, 252 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 253 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 254 NPC_LT_LF_TU_MPLS_IN_NSH, 255 NPC_LT_LF_TU_3RD_NSH, 256 }; 257 258 enum npc_kpu_lg_ltype { 259 NPC_LT_LG_TU_IP = 1, 260 NPC_LT_LG_TU_IP6, 261 NPC_LT_LG_TU_ARP, 262 NPC_LT_LG_TU_ETHER_IN_NSH, 263 }; 264 265 /* Don't modify Ltypes up to SCTP, otherwise it will 266 * effect flow tag calculation and thus RSS. 267 */ 268 enum npc_kpu_lh_ltype { 269 NPC_LT_LH_TU_TCP = 1, 270 NPC_LT_LH_TU_UDP, 271 NPC_LT_LH_TU_ICMP, 272 NPC_LT_LH_TU_SCTP, 273 NPC_LT_LH_TU_ICMP6, 274 NPC_LT_LH_TU_IGMP = 8, 275 NPC_LT_LH_TU_ESP, 276 NPC_LT_LH_TU_AH, 277 }; 278 279 /* Structures definitions */ 280 struct npc_kpu_profile_cam { 281 uint8_t state; 282 uint8_t state_mask; 283 uint16_t dp0; 284 uint16_t dp0_mask; 285 uint16_t dp1; 286 uint16_t dp1_mask; 287 uint16_t dp2; 288 uint16_t dp2_mask; 289 }; 290 291 struct npc_kpu_profile_action { 292 uint8_t errlev; 293 uint8_t errcode; 294 uint8_t dp0_offset; 295 uint8_t dp1_offset; 296 uint8_t dp2_offset; 297 uint8_t bypass_count; 298 uint8_t parse_done; 299 uint8_t next_state; 300 uint8_t ptr_advance; 301 uint8_t cap_ena; 302 uint8_t lid; 303 uint8_t ltype; 304 uint8_t flags; 305 uint8_t offset; 306 uint8_t mask; 307 uint8_t right; 308 uint8_t shift; 309 }; 310 311 struct npc_kpu_profile { 312 int cam_entries; 313 int action_entries; 314 struct npc_kpu_profile_cam *cam; 315 struct npc_kpu_profile_action *action; 316 }; 317 318 /* NPC KPU register formats */ 319 struct npc_kpu_cam { 320 uint64_t dp0_data : 16; 321 uint64_t dp1_data : 16; 322 uint64_t dp2_data : 16; 323 uint64_t state : 8; 324 uint64_t rsvd_63_56 : 8; 325 }; 326 327 struct npc_kpu_action0 { 328 uint64_t var_len_shift : 3; 329 uint64_t var_len_right : 1; 330 uint64_t var_len_mask : 8; 331 uint64_t var_len_offset : 8; 332 uint64_t ptr_advance : 8; 333 uint64_t capture_flags : 8; 334 uint64_t capture_ltype : 4; 335 uint64_t capture_lid : 3; 336 uint64_t rsvd_43 : 1; 337 uint64_t next_state : 8; 338 uint64_t parse_done : 1; 339 uint64_t capture_ena : 1; 340 uint64_t byp_count : 3; 341 uint64_t rsvd_63_57 : 7; 342 }; 343 344 struct npc_kpu_action1 { 345 uint64_t dp0_offset : 8; 346 uint64_t dp1_offset : 8; 347 uint64_t dp2_offset : 8; 348 uint64_t errcode : 8; 349 uint64_t errlev : 4; 350 uint64_t rsvd_63_36 : 28; 351 }; 352 353 struct npc_kpu_pkind_cpi_def { 354 uint64_t cpi_base : 10; 355 uint64_t rsvd_11_10 : 2; 356 uint64_t add_shift : 3; 357 uint64_t rsvd_15 : 1; 358 uint64_t add_mask : 8; 359 uint64_t add_offset : 8; 360 uint64_t flags_mask : 8; 361 uint64_t flags_match : 8; 362 uint64_t ltype_mask : 4; 363 uint64_t ltype_match : 4; 364 uint64_t lid : 3; 365 uint64_t rsvd_62_59 : 4; 366 uint64_t ena : 1; 367 }; 368 369 struct nix_rx_action { 370 uint64_t op :4; 371 uint64_t pf_func :16; 372 uint64_t index :20; 373 uint64_t match_id :16; 374 uint64_t flow_key_alg :5; 375 uint64_t rsvd_63_61 :3; 376 }; 377 378 struct nix_tx_action { 379 uint64_t op :4; 380 uint64_t rsvd_11_4 :8; 381 uint64_t index :20; 382 uint64_t match_id :16; 383 uint64_t rsvd_63_48 :16; 384 }; 385 386 /* NPC layer parse information structure */ 387 struct npc_layer_info_s { 388 uint32_t lptr : 8; 389 uint32_t flags : 8; 390 uint32_t ltype : 4; 391 uint32_t rsvd_31_20 : 12; 392 }; 393 394 /* NPC layer mcam search key extract structure */ 395 struct npc_layer_kex_s { 396 uint16_t flags : 8; 397 uint16_t ltype : 4; 398 uint16_t rsvd_15_12 : 4; 399 }; 400 401 /* NPC mcam search key x1 structure */ 402 struct npc_mcam_key_x1_s { 403 uint64_t intf : 2; 404 uint64_t rsvd_63_2 : 62; 405 uint64_t kw0 : 64; /* W1 */ 406 uint64_t kw1 : 48; 407 uint64_t rsvd_191_176 : 16; 408 }; 409 410 /* NPC mcam search key x2 structure */ 411 struct npc_mcam_key_x2_s { 412 uint64_t intf : 2; 413 uint64_t rsvd_63_2 : 62; 414 uint64_t kw0 : 64; /* W1 */ 415 uint64_t kw1 : 64; /* W2 */ 416 uint64_t kw2 : 64; /* W3 */ 417 uint64_t kw3 : 32; 418 uint64_t rsvd_319_288 : 32; 419 }; 420 421 /* NPC mcam search key x4 structure */ 422 struct npc_mcam_key_x4_s { 423 uint64_t intf : 2; 424 uint64_t rsvd_63_2 : 62; 425 uint64_t kw0 : 64; /* W1 */ 426 uint64_t kw1 : 64; /* W2 */ 427 uint64_t kw2 : 64; /* W3 */ 428 uint64_t kw3 : 64; /* W4 */ 429 uint64_t kw4 : 64; /* W5 */ 430 uint64_t kw5 : 64; /* W6 */ 431 uint64_t kw6 : 64; /* W7 */ 432 }; 433 434 /* NPC parse key extract structure */ 435 struct npc_parse_kex_s { 436 uint64_t chan : 12; 437 uint64_t errlev : 4; 438 uint64_t errcode : 8; 439 uint64_t l2m : 1; 440 uint64_t l2b : 1; 441 uint64_t l3m : 1; 442 uint64_t l3b : 1; 443 uint64_t la : 12; 444 uint64_t lb : 12; 445 uint64_t lc : 12; 446 uint64_t ld : 12; 447 uint64_t le : 12; 448 uint64_t lf : 12; 449 uint64_t lg : 12; 450 uint64_t lh : 12; 451 uint64_t rsvd_127_124 : 4; 452 }; 453 454 /* NPC result structure */ 455 struct npc_result_s { 456 uint64_t intf : 2; 457 uint64_t pkind : 6; 458 uint64_t chan : 12; 459 uint64_t errlev : 4; 460 uint64_t errcode : 8; 461 uint64_t l2m : 1; 462 uint64_t l2b : 1; 463 uint64_t l3m : 1; 464 uint64_t l3b : 1; 465 uint64_t eoh_ptr : 8; 466 uint64_t rsvd_63_44 : 20; 467 uint64_t action : 64; /* W1 */ 468 uint64_t vtag_action : 64; /* W2 */ 469 uint64_t la : 20; 470 uint64_t lb : 20; 471 uint64_t lc : 20; 472 uint64_t rsvd_255_252 : 4; 473 uint64_t ld : 20; 474 uint64_t le : 20; 475 uint64_t lf : 20; 476 uint64_t rsvd_319_316 : 4; 477 uint64_t lg : 20; 478 uint64_t lh : 20; 479 uint64_t rsvd_383_360 : 24; 480 }; 481 482 #endif /* __OTX2_NPC_HW_H__ */ 483