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Searched refs:MV_MBUS_BRIDGE_BASE (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/arm/mv/
H A Dmvwin.h108 #define MV_MBUS_BRIDGE_BASE (MV_BASE + 0x20000) macro
109 #define MV_INTREGS_BASE (MV_MBUS_BRIDGE_BASE + 0x80)
110 #define MV_MP_CLOCKS_BASE (MV_MBUS_BRIDGE_BASE + 0x700)
112 #define MV_CPU_CONTROL_BASE_ARMV7 (MV_MBUS_BRIDGE_BASE + 0x1800)
113 #define MV_CPU_CONTROL_BASE (MV_MBUS_BRIDGE_BASE + 0x100)
H A Dmv_common.c863 WIN_REG_IDX_RD(win_cpu_armv5, cr, MV_WIN_CPU_CTRL_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD() argument
864 WIN_REG_IDX_RD(win_cpu_armv5, br, MV_WIN_CPU_BASE_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
865 WIN_REG_IDX_RD(win_cpu_armv5, remap_l, MV_WIN_CPU_REMAP_LO_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
866 WIN_REG_IDX_RD(win_cpu_armv5, remap_h, MV_WIN_CPU_REMAP_HI_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
867 WIN_REG_IDX_WR(win_cpu_armv5, cr, MV_WIN_CPU_CTRL_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
868 WIN_REG_IDX_WR(win_cpu_armv5, br, MV_WIN_CPU_BASE_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
869 WIN_REG_IDX_WR(win_cpu_armv5, remap_l, MV_WIN_CPU_REMAP_LO_ARMV5, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
872 WIN_REG_IDX_RD(win_cpu_armv7, cr, MV_WIN_CPU_CTRL_ARMV7, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
873 WIN_REG_IDX_RD(win_cpu_armv7, br, MV_WIN_CPU_BASE_ARMV7, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
876 WIN_REG_IDX_WR(win_cpu_armv7, cr, MV_WIN_CPU_CTRL_ARMV7, MV_MBUS_BRIDGE_BASE) in WIN_REG_IDX_RD()
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/f-stack/freebsd/arm/mv/armada38x/
H A Darmada38x.c109 rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE, in armada38x_win_set_iosync_barrier()
132 rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE, in armada38x_open_bootrom_win()
/f-stack/freebsd/arm/mv/armadaxp/
H A Darmadaxp.c86 #define MV_COHERENCY_FABRIC_BASE (MV_MBUS_BRIDGE_BASE + 0x200)