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Searched refs:MTK_M4U_ID (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/contrib/device-tree/include/dt-bindings/memory/
H A Dmt6779-larb-port.h10 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) macro
29 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 3)
30 #define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB0_ID, 4)
31 #define M4U_PORT_DISP_PVRIC0 MTK_M4U_ID(M4U_LARB0_ID, 5)
32 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6)
33 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7)
34 #define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 8)
44 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB1_ID, 7)
45 #define M4U_PORT_MDP_RDMA1 MTK_M4U_ID(M4U_LARB1_ID, 8)
90 #define M4U_PORT_IMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 0)
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H A Dmt8183-larb-port.h9 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) macro
21 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
24 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 3)
25 #define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 4)
26 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5)
27 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6)
28 #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB0_ID, 7)
29 #define M4U_PORT_MDP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 8)
42 #define M4U_PORT_IMG_IPUO MTK_M4U_ID(M4U_LARB2_ID, 0)
44 #define M4U_PORT_IMG_IPUI MTK_M4U_ID(M4U_LARB2_ID, 2)
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H A Dmt8173-larb-port.h9 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) macro
19 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
41 #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
42 #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
43 #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
44 #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
47 #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
49 #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID, 8)
59 #define M4U_PORT_RB MTK_M4U_ID(M4U_LARB2_ID, 18)
60 #define M4U_PORT_RP MTK_M4U_ID(M4U_LARB2_ID, 19)
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H A Dmt2712-larb-port.h9 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) macro
23 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
24 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1)
25 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2)
26 #define M4U_PORT_DISP_OD_R MTK_M4U_ID(M4U_LARB0_ID, 3)
27 #define M4U_PORT_DISP_OD_W MTK_M4U_ID(M4U_LARB0_ID, 4)
28 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5)
29 #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 6)
87 #define M4U_PORT_VDO MTK_M4U_ID(M4U_LARB8_ID, 0)
88 #define M4U_PORT_NR MTK_M4U_ID(M4U_LARB8_ID, 1)
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