Searched refs:MLX5_WQE_SIZE (Results 1 – 5 of 5) sorted by relevance
302 umem_size = MLX5_WQE_SIZE * wq->sq_size; in mlx5_txpp_create_rearm_queue()331 sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); in mlx5_txpp_create_rearm_queue()391 wqe_size = RTE_ALIGN(wqe_size, MLX5_WQE_SIZE); in mlx5_txpp_fill_wqe_clock_queue()539 MLX5_WQE_SIZE) / MLX5_WQE_SIZE; in mlx5_txpp_create_clock_queue()546 umem_size = MLX5_WQE_SIZE * wq->sq_size; in mlx5_txpp_create_clock_queue()583 sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); in mlx5_txpp_create_clock_queue()
744 return rte_align32pow2(wqe_size * desc) / MLX5_WQE_SIZE; in txq_calc_wqebb_cnt()770 wqe_size = wqe_size * MLX5_WQE_SIZE - in txq_calc_inline_max()875 temp = RTE_ALIGN(temp, MLX5_WQE_SIZE); in txq_set_params()936 MLX5_WQE_SIZE + MLX5_DSEG_MIN_INLINE_SIZE); in txq_set_params()938 temp = RTE_ALIGN(temp, MLX5_WQE_SIZE); in txq_set_params()
791 MLX5_WQE_SIZE * in mlx5_tx_error_cqe_handle()3118 txq->wqe_s * MLX5_WQE_SIZE) / MLX5_WSEG_SIZE; in mlx5_tx_mseg_build()3156 if (loc->wqe_free <= MLX5_WQE_SIZE_MAX / MLX5_WQE_SIZE || in mlx5_tx_schedule_send()4299 room = RTE_MIN(MLX5_WQE_SIZE_MAX / MLX5_WQE_SIZE, in mlx5_tx_burst_empw_inline()4300 loc->wqe_free) * MLX5_WQE_SIZE - in mlx5_tx_burst_empw_inline()5578 static_assert(MLX5_WQE_SIZE == 4 * MLX5_WSEG_SIZE, in mlx5_select_tx_function()
1378 sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); in mlx5_txq_create_devx_sq_resources()
46 #define MLX5_WQE_SIZE sizeof(struct mlx5_wqe) macro72 #define MLX5_EMPW_DEF_INLINE_LEN (4u * MLX5_WQE_SIZE + \108 #define MLX5_SEND_DEF_INLINE_LEN (5U * MLX5_WQE_SIZE + \