Searched refs:MISC_REG_CPMU_LP_MASK_ENT_P0 (Results 1 – 2 of 2) sorted by relevance
895 #define MISC_REG_CPMU_LP_MASK_ENT_P0 0xa880 macro
7596 REG_WR(sc, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2), in elink_update_link_down()7648 REG_WR(sc, MISC_REG_CPMU_LP_MASK_ENT_P0 + in elink_update_link_up()