Searched refs:MDIO_WC_REG_RX66_SCW2_MASK (Results 1 – 2 of 2) sorted by relevance
5814 #define MDIO_WC_REG_RX66_SCW2_MASK 0x83c8 macro
686 #define MDIO_WC_REG_RX66_SCW2_MASK 0x83c8 macro5028 MDIO_WC_REG_RX66_SCW2_MASK, 0xF0F0); in elink_warpcore_set_20G_DXGXS()