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Searched refs:MDIO_REG_BANK_AER_BLOCK (Results 1 – 2 of 2) sorted by relevance

/f-stack/dpdk/drivers/net/bnx2x/
H A Delink.c277 #define MDIO_REG_BANK_AER_BLOCK 0xFFD0 macro
4150 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_set_aer_mmd()
4579 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_restart_AN_KR()
4634 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR()
4695 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR()
4766 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_10G_KR()
4950 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2()
4988 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2()
5484 CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_link_reset()
7174 (MDIO_REG_BANK_AER_BLOCK + in elink_set_xgxs_loopback()
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H A Decore_reg.h5402 #define MDIO_REG_BANK_AER_BLOCK 0xFFD0 macro