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Searched refs:M4 (Results 1 – 24 of 24) sorted by relevance

/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dvf610m4-colibri.dts3 * Device tree for Colibri VF61 Cortex-M4 support
12 model = "VF610 Cortex-M4";
H A Dvf610m4-cosmic.dts2 * Device tree for Cosmic+ VF6xx Cortex-M4 support
51 model = "VF610 Cortex-M4";
H A Dvf610m4.dtsi2 * Device tree for VF6xx Cortex-M4 support
H A Dimx6sx-udoo-neo.dtsi327 /* Cortex-M4 serial */
H A Dimx6sx-nitrogen6sx.dts135 label = "M4";
H A Dimx7s.dtsi228 /* M4 input */
/f-stack/freebsd/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-nanopi-m4.dts3 * FriendlyElec NanoPi M4 board device tree source
16 model = "FriendlyElec NanoPi M4";
/f-stack/freebsd/contrib/device-tree/src/arm64/realtek/
H A Drtd1395-bpi-m4.dts12 model = "Banana Pi BPI-M4";
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dimx7ulp-scg-clock.yaml17 The clocking scheme provides clear separation between M4 domain
23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
H A Dimx7ulp-pcc-clock.yaml17 The clocking scheme provides clear separation between M4 domain
23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
H A Dimx7ulp-clock.txt7 The clocking scheme provides clear separation between M4 domain
13 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
/f-stack/freebsd/contrib/device-tree/Bindings/remoteproc/
H A Dimx-rproc.txt4 This binding provides support for ARM Cortex M4 Co-processor found on some
H A Dmtk,scp.txt4 This binding provides support for ARM Cortex M4 Co-processor found on some
H A Dti,omap-remoteproc.yaml25 Cortex-M4 processors.
/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c208 xmmi M0, M1, M2, M3, M4; in poly1305_blocks() local
396 M4 = _mm_or_si128(_mm_srli_epi64(T6, 40), HIBIT); in poly1305_blocks()
418 v00 = M4; in poly1305_blocks()
423 v10 = M4; in poly1305_blocks()
428 v20 = M4; in poly1305_blocks()
435 v30 = M4; in poly1305_blocks()
451 v40 = M4; in poly1305_blocks()
/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Drealtek.yaml48 - bananapi,bpi-m4 # Banana Pi BPI-M4
H A Dfsl.yaml390 The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx7ulp-pinctrl.txt3 i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7
/f-stack/freebsd/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,vf610-mscm-ir.txt8 which comes with a Cortex-A5/Cortex-M4 combination).
H A Dfsl,scu.txt31 be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
/f-stack/freebsd/contrib/openzfs/config/
H A Dzfs-meta.m4201 dnl # The "$[]1" and "$[]2" constructs prevent M4 parameter expansion
203 dnl # whereas the "$1" will undergo M4 parameter expansion for the META key.
/f-stack/freebsd/contrib/device-tree/src/arm64/ti/
H A Dk3-am654-base-board.dts108 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
/f-stack/dpdk/doc/guides/nics/
H A Denic.rst379 - Run on a UCS M4 or later server with CPUs that support AVX2.
/f-stack/freebsd/contrib/dev/acpica/
H A Dchanges.txt4143 manageability. Generation now requires the M4 macro preprocessor, which