Searched refs:JZ_UHCCDR (Results 1 – 2 of 2) sorted by relevance
| /f-stack/freebsd/mips/ingenic/ |
| H A D | jz4780_clock.c | 280 MUX(JZ_UHCCDR, 30, 2, 0xf),
281 DIV(JZ_UHCCDR, 0, 0, 8, 29, 28, 27),
|
| H A D | jz4780_regs.h | 228 #define JZ_UHCCDR 0x0000006c /* UHC 48M clock divider register */ macro
|