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Searched refs:JZ_DDCDR (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/mips/ingenic/
H A Djz4780_clock.c210 MUX(JZ_DDCDR, 30, 2, 0x6),
211 DIV(JZ_DDCDR, 0, 0, 4, 29, 28, 27),
H A Djz4780_regs.h210 #define JZ_DDCDR 0x0000002c /* DDR clock divider register */ macro