Searched refs:JZ_CLKGR0 (Results 1 – 3 of 3) sorted by relevance
275 off = JZ_CLKGR0; in jz4780_clk_gen_set_gate()
160 #define JZ_CLKGR0 0x00000020 /* Clock Gating Registers */ macro
440 gatedef.offset = JZ_CLKGR0; in jz4780_clock_register()