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Searched refs:JZ4780_CLK_DDR0 (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/contrib/device-tree/include/dt-bindings/clock/
H A Djz4780-cgu.h74 #define JZ4780_CLK_DDR0 59 macro
/f-stack/freebsd/mips/ingenic/
H A Djz4780_clock.c368 GATE(JZ4780_CLK_DDR0, "ddr0", "ddr", 30),