Home
last modified time | relevance | path

Searched refs:IXGBE_WRITE_REG (Results 1 – 21 of 21) sorted by relevance

/f-stack/dpdk/drivers/net/ixgbe/
H A Dixgbe_ipsec.c63 IXGBE_WRITE_REG(hw, IXGBE_IPSRXSPI, 0); in ixgbe_crypto_clear_ipsec_tables()
71 IXGBE_WRITE_REG(hw, IXGBE_IPSRXSALT, 0); in ixgbe_crypto_clear_ipsec_tables()
72 IXGBE_WRITE_REG(hw, IXGBE_IPSRXMOD, 0); in ixgbe_crypto_clear_ipsec_tables()
190 IXGBE_WRITE_REG(hw, IXGBE_IPSRXSPI, in ixgbe_crypto_add_sa()
192 IXGBE_WRITE_REG(hw, IXGBE_IPSRXIPIDX, in ixgbe_crypto_add_sa()
205 IXGBE_WRITE_REG(hw, IXGBE_IPSRXKEY(0), in ixgbe_crypto_add_sa()
207 IXGBE_WRITE_REG(hw, IXGBE_IPSRXKEY(1), in ixgbe_crypto_add_sa()
213 IXGBE_WRITE_REG(hw, IXGBE_IPSRXSALT, in ixgbe_crypto_add_sa()
215 IXGBE_WRITE_REG(hw, IXGBE_IPSRXMOD, in ixgbe_crypto_add_sa()
260 IXGBE_WRITE_REG(hw, IXGBE_IPSTXSALT, in ixgbe_crypto_add_sa()
[all …]
H A Dixgbe_bypass_api.h71 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
78 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
83 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
91 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
94 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
100 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
105 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
120 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
125 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_bypass_rw_generic()
H A Dixgbe_fdir.c145 IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); in fdir_enable_82599()
298 IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); in fdir_set_input_mask_82599()
375 IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); in fdir_set_input_mask_x550()
598 IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); in ixgbe_set_fdir_flex_conf()
642 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), in ixgbe_fdir_configure()
652 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), 0); in ixgbe_fdir_configure()
900 IXGBE_WRITE_REG(hw, IXGBE_FDIRSIPv6(2), in fdir_write_perfect_filter_82599()
903 IXGBE_WRITE_REG(hw, IXGBE_FDIRIPSA, 0); in fdir_write_perfect_filter_82599()
904 IXGBE_WRITE_REG(hw, IXGBE_FDIRIPDA, 0); in fdir_write_perfect_filter_82599()
905 IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, 0); in fdir_write_perfect_filter_82599()
[all …]
H A Dixgbe_pf.c201 IXGBE_WRITE_REG(hw, IXGBE_ETQF(i), in ixgbe_add_tx_flow_control_drop_filter()
234 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vtctl); in ixgbe_pf_host_configure()
283 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); in ixgbe_pf_host_configure()
284 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); in ixgbe_pf_host_configure()
291 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlanctrl); in ixgbe_pf_host_configure()
349 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); in set_rx_mode()
366 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); in ixgbe_vf_reset_event()
368 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), 0); in ixgbe_vf_reset_event()
404 IXGBE_WRITE_REG(hw, IXGBE_QDE, reg); in ixgbe_vf_reset_msg()
432 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); in ixgbe_disable_vf_mc_promisc()
[all …]
H A Dixgbe_rxtx.c3619 IXGBE_WRITE_REG(hw, reta_reg, in ixgbe_rss_configure()
3736 IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), in ixgbe_vmdq_dcb_configure()
3818 IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), in ixgbe_vmdq_dcb_hw_tx_config()
4000 IXGBE_WRITE_REG(hw, IXGBE_QDE, in ixgbe_dcb_rx_hw_config()
4006 IXGBE_WRITE_REG(hw, IXGBE_QDE, in ixgbe_dcb_rx_hw_config()
4430 IXGBE_WRITE_REG(hw, IXGBE_QDE, in ixgbe_vmdq_tx_hw_configure()
4513 IXGBE_WRITE_REG(hw, IXGBE_MRQC, in ixgbe_config_vf_default()
4518 IXGBE_WRITE_REG(hw, IXGBE_MRQC, in ixgbe_config_vf_default()
4523 IXGBE_WRITE_REG(hw, IXGBE_MRQC, in ixgbe_config_vf_default()
5276 IXGBE_WRITE_REG(hw, in ixgbe_setup_loopback_link_82599()
[all …]
H A Drte_pmd_ixgbe.c170 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), ctrl); in rte_pmd_ixgbe_set_vf_vlan_insert()
200 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, ctrl); in rte_pmd_ixgbe_set_tx_loopback()
229 IXGBE_WRITE_REG(hw, IXGBE_QDE, reg_value); in rte_pmd_ixgbe_set_all_queues_drop_en()
409 IXGBE_WRITE_REG(hw, addr, reg); in rte_pmd_ixgbe_set_vf_rx()
459 IXGBE_WRITE_REG(hw, addr, reg); in rte_pmd_ixgbe_set_vf_tx()
637 IXGBE_WRITE_REG(hw, IXGBE_LSECTXPN0, pn); in rte_pmd_ixgbe_macsec_select_txsa()
647 IXGBE_WRITE_REG(hw, IXGBE_LSECTXPN1, pn); in rte_pmd_ixgbe_macsec_select_txsa()
660 IXGBE_WRITE_REG(hw, IXGBE_LSECTXSA, ctrl); in rte_pmd_ixgbe_macsec_select_txsa()
805 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); in rte_pmd_ixgbe_upd_fctrl_sbp()
1072 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in rte_pmd_ixgbe_mdio_unlocked_read()
[all …]
H A Dixgbe_ethdev.c835 IXGBE_WRITE_REG(hw, IXGBE_EIMC, ~0); in ixgbe_disable_intr()
857 IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), 0); in ixgbe_reset_qstat_mappings()
5049 IXGBE_WRITE_REG(hw, reta_reg, reta); in ixgbe_dev_rss_reta_update()
5672 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, in ixgbe_uc_hash_table_set()
6168 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); in ixgbe_configure_msix()
6247 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, in ixgbe_set_queue_rate_limit()
6250 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, in ixgbe_set_queue_rate_limit()
6966 IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, in ixgbe_start_timecounters()
8146 IXGBE_WRITE_REG(hw, IXGBE_ETQF(i), in ixgbe_ethertype_filter_restore()
8148 IXGBE_WRITE_REG(hw, IXGBE_ETQS(i), in ixgbe_ethertype_filter_restore()
[all …]
H A Dixgbe_82599_bypass.c133 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_setup_mac_link_multispeed_fixed_fiber()
/f-stack/dpdk/drivers/net/ixgbe/base/
H A Dixgbe_dcb_82599.c105 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
138 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
161 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_dcb_config_tx_desc_arbiter_82599()
162 IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0); in ixgbe_dcb_config_tx_desc_arbiter_82599()
186 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82599()
216 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
251 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
289 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg); in ixgbe_dcb_config_pfc_82599()
523 IXGBE_WRITE_REG(hw, IXGBE_MRQC, reg); in ixgbe_dcb_config_82599()
534 IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg); in ixgbe_dcb_config_82599()
[all …]
H A Dixgbe_dcb_82598.c91 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
101 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
113 IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); in ixgbe_dcb_config_rx_arbiter_82598()
120 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
125 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
156 IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
200 IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
220 IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
241 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_pfc_82598()
250 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg); in ixgbe_dcb_config_pfc_82598()
[all …]
H A Dixgbe_82598.c79 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
489 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); in ixgbe_fc_enable_82598()
490 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); in ixgbe_fc_enable_82598()
501 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); in ixgbe_fc_enable_82598()
502 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); in ixgbe_fc_enable_82598()
510 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); in ixgbe_fc_enable_82598()
730 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in ixgbe_setup_mac_link_82598()
850 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82598()
879 IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); in ixgbe_reset_hw_82598()
1055 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, in ixgbe_read_analog_reg8_82598()
[all …]
H A Dixgbe_common.c427 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_start_hw_gen2()
428 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0); in ixgbe_start_hw_gen2()
1594 IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd); in ixgbe_read_eerd_buffer_generic()
1933 IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); in ixgbe_release_eeprom_semaphore()
2479 IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0); in ixgbe_init_rx_addrs_generic()
2480 IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0); in ixgbe_init_rx_addrs_generic()
2489 IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); in ixgbe_init_rx_addrs_generic()
2721 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, in ixgbe_update_mc_addr_list_generic()
3304 IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr); in ixgbe_release_swfw_sync()
3868 IXGBE_WRITE_REG(hw, IXGBE_UTA(i), 0); in ixgbe_init_uta_tables_generic()
[all …]
H A Dixgbe_82599.c102 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_init_phy_ops_82599()
267 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in prot_autoc_write_82599()
1055 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82599()
1214 IXGBE_WRITE_REG(hw, IXGBE_FDIRFREE, 0); in ixgbe_reinit_fdir_tables_82599()
1223 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1227 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1390 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_set_fdir_drop_queue_82599()
1394 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_set_fdir_drop_queue_82599()
1959 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_fdir_erase_perfect_filter_82599()
2462 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, in ixgbe_reset_pipeline_82599()
[all …]
H A Dixgbe_vf.c10 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
85 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); in ixgbe_virt_clr_reg()
88 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); in ixgbe_virt_clr_reg()
89 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); in ixgbe_virt_clr_reg()
90 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); in ixgbe_virt_clr_reg()
92 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); in ixgbe_virt_clr_reg()
93 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); in ixgbe_virt_clr_reg()
94 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); in ixgbe_virt_clr_reg()
95 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); in ixgbe_virt_clr_reg()
96 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); in ixgbe_virt_clr_reg()
[all …]
H A Dixgbe_x540.c203 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X540()
667 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
680 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
768 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), in ixgbe_acquire_swfw_sync_X540()
842 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); in ixgbe_release_swfw_sync_X540()
922 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
926 IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
990 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_start_X540()
996 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_start_X540()
1025 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_stop_X540()
[all …]
H A Dixgbe_mbx.c377 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_VFU); in ixgbe_obtain_mbx_lock_vf()
422 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ); in ixgbe_write_mbx_vf()
456 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK); in ixgbe_read_mbx_vf()
504 IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); in ixgbe_check_for_bit_pf()
590 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); in ixgbe_check_for_rst_pf()
612 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); in ixgbe_obtain_mbx_lock_pf()
657 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); in ixgbe_write_mbx_pf()
696 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); in ixgbe_read_mbx_pf()
H A Dixgbe_osdep.h129 #define IXGBE_WRITE_REG(hw, reg, value) \ macro
141 IXGBE_WRITE_REG(hw, (reg), (val)); \
H A Dixgbe_phy.c579 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
610 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
682 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
690 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
719 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
2261 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_i2c_stop()
2315 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2341 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_get_i2c_ack()
2390 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2494 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_lower_i2c_clk()
[all …]
H A Dixgbe_x550.c306 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_setup_mux_ctl()
862 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
888 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
965 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
972 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
1336 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); in ixgbe_disable_mdd_X550()
1341 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_disable_mdd_X550()
1359 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); in ixgbe_enable_mdd_X550()
1364 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_enable_mdd_X550()
2483 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X550em()
[all …]
H A Dixgbe_common.h11 IXGBE_WRITE_REG(hw, reg, (u32) value); \
12 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
H A Dixgbe_hv_vf.c179 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(0), reg); in ixgbevf_hv_set_rlpml_vf()