Searched refs:IXGBE_DCB_MAX_TRAFFIC_CLASS (Results 1 – 13 of 13) sorted by relevance
468 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_desc_arbiter_cee()469 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_desc_arbiter_cee()470 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_desc_arbiter_cee()471 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_desc_arbiter_cee()508 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_data_arbiter_cee()509 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_data_arbiter_cee()511 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_data_arbiter_cee()512 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_config_tx_data_arbiter_cee()613 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_hw_config_cee()614 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; in ixgbe_dcb_hw_config_cee()[all …]
26 if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) in ixgbe_dcb_get_tc_stats_82598()60 if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) in ixgbe_dcb_get_pfc_stats_82598()104 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_rx_arbiter_82598()159 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_desc_arbiter_82598()203 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_data_arbiter_82598()253 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_pfc_82598()268 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_dcb_config_pfc_82598()
26 if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) in ixgbe_dcb_get_tc_stats_82599()67 if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) in ixgbe_dcb_get_pfc_stats_82599()120 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_rx_arbiter_82599()166 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_desc_arbiter_82599()231 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_tx_data_arbiter_82599()327 for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_config_pfc_82599()334 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_dcb_config_pfc_82599()
92 struct ixgbe_dcb_tc_config tc_config[IXGBE_DCB_MAX_TRAFFIC_CLASS];
398 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_fc_enable_82598()493 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_fc_enable_82598()509 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_fc_enable_82598()
676 #define IXGBE_DCB_MAX_TRAFFIC_CLASS 8 macro3809 u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl High-water */3810 u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl Low-water */
2788 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_fc_enable_generic()2865 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_fc_enable_generic()2888 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_fc_enable_generic()
925 for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) { in ixgbe_dmac_config_tcs_X550()
160 cap->n_nodes_max = 1 + IXGBE_DCB_MAX_TRAFFIC_CLASS + in ixgbe_tm_capabilities_get()865 cap->n_nodes_max = IXGBE_DCB_MAX_TRAFFIC_CLASS; in ixgbe_level_capabilities_get()866 cap->n_nodes_nonleaf_max = IXGBE_DCB_MAX_TRAFFIC_CLASS; in ixgbe_level_capabilities_get()891 IXGBE_DCB_MAX_TRAFFIC_CLASS; in ixgbe_level_capabilities_get()970 IXGBE_DCB_MAX_TRAFFIC_CLASS; in ixgbe_node_capabilities_get()
729 if (tc_num > IXGBE_DCB_MAX_TRAFFIC_CLASS) { in rte_pmd_ixgbe_set_tc_bw_alloc()731 IXGBE_DCB_MAX_TRAFFIC_CLASS); in rte_pmd_ixgbe_set_tc_bw_alloc()771 for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in rte_pmd_ixgbe_set_tc_bw_alloc()
3844 for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { in ixgbe_vmdq_dcb_rx_config()3877 for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { in ixgbe_dcb_vt_tx_config()3904 for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { in ixgbe_dcb_rx_config()3931 for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { in ixgbe_dcb_tx_config()4092 uint8_t tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS] = {0}; in ixgbe_dcb_hw_configure()4093 uint8_t bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS] = {0}; in ixgbe_dcb_hw_configure()4094 uint16_t refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = {0}; in ixgbe_dcb_hw_configure()4095 uint16_t max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = {0}; in ixgbe_dcb_hw_configure()4096 uint8_t map[IXGBE_DCB_MAX_TRAFFIC_CLASS] = {0}; in ixgbe_dcb_hw_configure()4167 for (i = 0; mask && (i < IXGBE_DCB_MAX_TRAFFIC_CLASS); i++) { in ixgbe_dcb_hw_configure()[all …]
301 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_pf_host_configure()
955 uint8_t dcb_max_tc = IXGBE_DCB_MAX_TRAFFIC_CLASS; in ixgbe_dcb_init()1140 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in eth_ixgbe_dev_init()4849 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_pfc_enable_generic()4872 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { in ixgbe_dcb_pfc_enable_generic()4923 for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) in ixgbe_dcb_pfc_enable_generic()