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Searched refs:IPN3KE_HW_BASE (Results 1 – 2 of 2) sorted by relevance

/f-stack/dpdk/drivers/net/ipn3ke/
H A Dipn3ke_ethdev.c132 (IPN3KE_HW_BASE + 0), 0, 0xFFFF); in ipn3ke_hw_cap_init()
134 (IPN3KE_HW_BASE + 0x8), 0, 0xFFFFFFFF); in ipn3ke_hw_cap_init()
136 (IPN3KE_HW_BASE + 0x10), 0, 0xFFFFFFFF); in ipn3ke_hw_cap_init()
142 (IPN3KE_HW_BASE + 0x24), 0, 0xFFFF); in ipn3ke_hw_cap_init()
146 (IPN3KE_HW_BASE + 0x2C), 0, 0xFFFF); in ipn3ke_hw_cap_init()
150 (IPN3KE_HW_BASE + 0x34), 0, 0xFFFF); in ipn3ke_hw_cap_init()
154 (IPN3KE_HW_BASE + 0x3C), 0, 0xFFFF); in ipn3ke_hw_cap_init()
158 (IPN3KE_HW_BASE + 0x44), 0, 0xFFFF); in ipn3ke_hw_cap_init()
162 (IPN3KE_HW_BASE + 0x4C), 0, 0xFFFF); in ipn3ke_hw_cap_init()
166 (IPN3KE_HW_BASE + 0x54), 0, 0xFFFF); in ipn3ke_hw_cap_init()
[all …]
H A Dipn3ke_ethdev.h156 #define IPN3KE_HW_BASE 0x4000000 macro
159 (IPN3KE_HW_BASE + hw->hw_cap.capability_registers_block_offset)
162 (IPN3KE_HW_BASE + hw->hw_cap.status_registers_block_offset)
165 (IPN3KE_HW_BASE + hw->hw_cap.control_registers_block_offset)
171 (IPN3KE_HW_BASE + hw->hw_cap.classify_offset)
174 (IPN3KE_HW_BASE + hw->hw_cap.policer_offset)
177 (IPN3KE_HW_BASE + hw->hw_cap.rss_key_array_offset)
183 (IPN3KE_HW_BASE + hw->hw_cap.dmac_map_offset)
186 (IPN3KE_HW_BASE + hw->hw_cap.qm_offset)
189 (IPN3KE_HW_BASE + hw->hw_cap.ccb_offset)
[all …]