| /f-stack/dpdk/drivers/common/iavf/ |
| H A D | iavf_common.c | 594 IAVF_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
595 IAVF_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
596 IAVF_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
598 IAVF_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
599 IAVF_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
600 IAVF_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
684 IAVF_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
685 IAVF_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
686 IAVF_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY4),
688 IAVF_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/mmc/ |
| H A D | renesas,sdhi.txt | 5 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
6 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
7 "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
8 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
9 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
10 "renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
11 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
12 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
13 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
19 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
[all …]
|
| /f-stack/dpdk/drivers/net/ice/base/ |
| H A D | ice_lan_tx_rx.h | 1264 ICE_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
1265 ICE_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
1266 ICE_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
1268 ICE_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
1269 ICE_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
1270 ICE_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
1354 ICE_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
1355 ICE_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
1356 ICE_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3),
1358 ICE_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
[all …]
|
| /f-stack/dpdk/examples/ipsec-secgw/test/ |
| H A D | tun_null_header_reconstruct.py | 133 pkt = IP(src=src, dst=dst, tos=tos)
148 pkt[IP].tos = tos_outter
166 pkt[IP].tos = tos_outter
199 self.assertEqual(resp[IP].tos, ECN_CE)
239 self.assertEqual(resp[IP].tos, ECN_CE)
278 self.assertEqual(resp[IP].tos, ECN_CE)
326 self.assertEqual(resp[IP].tos, ECN_CE)
333 self.assertEqual(resp[IP].tos, ECN_CE)
338 self.assertEqual(resp[IP].tos, ECN_CE)
366 self.assertEqual(resp[IP].tos, ECN_CE)
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/sifive/ |
| H A D | sifive-blocks-ip-versioning.txt | 1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
9 IP block-specific DT compatible strings are contained within the HDL,
16 Until these IP blocks (or IP integration) support version
17 auto-discovery, the maintainers of these IP blocks intend to increment
19 interface to these IP blocks changes, or when the functionality of the
20 underlying IP blocks changes in a way that software should be aware of.
26 match on these IP block-specific compatible strings.
33 IP block-specific compatible string (such as "sifive,uart0") should
|
| /f-stack/freebsd/contrib/device-tree/Bindings/media/xilinx/ |
| H A D | video.txt | 1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
8 Each video IP core is represented by an AMBA bus child node in the device
9 tree using bindings documented in this directory. Connections between the IP
18 The following properties are common to all Xilinx video IP cores.
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
22 Video IP and System Design Guide" [UG934]. How the format relates to the IP
23 core is described in the IP core bindings documentation.
|
| H A D | xlnx,video.txt | 1 Xilinx Video IP Pipeline (VIPP)
7 Xilinx video IP pipeline processes video streams through one or more Xilinx
8 video IP cores. Each video IP core is represented as documented in video.txt
9 and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT
11 mappings between DMAs and the video IP cores.
|
| H A D | xlnx,csi2rxss.yaml | 17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
77 description: Present when Video Format Bridge is enabled in IP configuration
81 description: Present if CSI v2 is enabled in IP configuration.
93 as set in IP configuration, are always active.
123 1 - For 1 lane enabled in IP.
124 1 2 - For 2 lanes enabled in IP.
125 1 2 3 - For 3 lanes enabled in IP.
126 1 2 3 4 - For 4 lanes enabled in IP.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ti/ |
| H A D | dra7-atl.txt | 3 The ATL IP is used to generate clock to be used to synchronize baseband and
4 audio codec. A single ATL IP provides four ATL clock instances sharing the same
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
18 of the IP.
27 Binding for the IP driver:
28 This binding is used to configure the IP driver which is going to handle the
29 configuration of the IP for the ATL clock instances.
33 - reg : base address for the ATL IP
75 /* binding for the IP */
|
| /f-stack/dpdk/doc/guides/howto/ |
| H A D | rte_flow.rst | 80 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.4', dst='192.168.3.1'), \
82 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.5', dst='192.168.3.2'), \
99 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.4', dst='192.168.3.1'), \
101 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.5', dst ='192.168.3.2'), \
178 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.4', dst='192.168.3.1'), \
180 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.5', dst='192.168.3.2'), \
182 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.6', dst='192.168.5.2'), \
200 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.4', dst='192.168.3.1'), \
202 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.5', dst='192.168.3.2'), \
204 >> sendp(Ether()/Dot1Q()/IP(src='176.80.50.6', dst='192.168.5.2'), \
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/ptp/ |
| H A D | ptp-ines.txt | 1 ZHAW InES PTP time stamping IP core
3 The IP core needs two different kinds of nodes. The control node
7 port index within the IP core.
17 the port channel within the IP core
|
| /f-stack/dpdk/drivers/net/txgbe/ |
| H A D | txgbe_ptypes.c | 92 TPTE(0x81, ETHER, IPV4, NONE, IP, NONE, IPV4, FRAG),
94 TPTE(0x83, ETHER, IPV4, NONE, IP, NONE, IPV4, UDP),
95 TPTE(0x84, ETHER, IPV4, NONE, IP, NONE, IPV4, TCP),
96 TPTE(0x85, ETHER, IPV4, NONE, IP, NONE, IPV4, SCTP),
97 TPTE(0x89, ETHER, IPV4, NONE, IP, NONE, IPV6, FRAG),
99 TPTE(0x8B, ETHER, IPV4, NONE, IP, NONE, IPV6, UDP),
100 TPTE(0x8C, ETHER, IPV4, NONE, IP, NONE, IPV6, TCP),
101 TPTE(0x8D, ETHER, IPV4, NONE, IP, NONE, IPV6, SCTP),
141 TPTE(0xC3, ETHER, IPV6, NONE, IP, NONE, IPV4, UDP),
142 TPTE(0xC4, ETHER, IPV6, NONE, IP, NONE, IPV4, TCP),
[all …]
|
| /f-stack/dpdk/doc/guides/sample_app_ug/ |
| H A D | ip_frag.rst | 4 IP Fragmentation Sample Application
20 * The first difference is that the IP Fragmentation sample application makes use of indirect buff…
23 based on information read from the input packet's IP header.
26 IP and non-IP traffic by means of offload flags.
29 associated with that IP address.
33 Before forwarding, the input IP packet is fragmented to fit into the "standard" Ethernet* v2 MTU (1…
49 If the IP packet size is greater than default output MTU,
135 IP Fragmentation sample application provides basic NUMA support
|
| H A D | ip_reassembly.rst | 4 IP Reassembly Sample Application
22 … that the forwarding decision is taken based on information read from the input packet's IP header.
24 * The second difference is that the application differentiates between IP and non-IP traffic by m…
101 the traffic generator should be generating valid fragmented IP packets.
144 The following sections describe aspects that are specific to the IP reassemble sample application.
151 Each IP packet is uniquely identified by triple <Source IP address>, <Destination IP address>, <ID>.
206 #. Searching the Fragment Table for entry with packet's <IP Source Address, IP Destination Address…
233 The RTE_LIBRTE_IP_FRAG_TBL_STAT controls statistics collection for the IP Fragment Table.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/display/ |
| H A D | st,stih4xx.txt | 6 - reg: Physical base address of the IP registers and length of memory mapped region.
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
32 - reg: Physical base address of the IP registers and length of memory mapped region.
33 - clocks: from common clock binding: handle hardware IP needed clocks, the
48 - reg: Physical base address of the IP registers and length of memory mapped region.
60 - reg: Physical base address of the IP registers and length of memory mapped region.
66 - clocks: from common clock binding: handle hardware IP needed clocks, the
79 - clocks: from common clock binding: handle hardware IP needed clocks, the
92 - clocks: from common clock binding: handle hardware IP needed clocks, the
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/media/ |
| H A D | allegro.txt | 1 Device-tree bindings for the Allegro DVT video IP codecs present in the Xilinx
2 ZynqMP SoC. The IP core may either be a H.264/H.265 encoder or H.264/H.265
11 "allegro,al5e-1.1", "allegro,al5e": encoder IP core
12 "allegro,al5d-1.1", "allegro,al5d": decoder IP core
|
| /f-stack/freebsd/contrib/device-tree/Bindings/sound/ |
| H A D | xlnx,spdif.txt | 1 Device-Tree bindings for Xilinx SPDIF IP
3 The IP supports playback and capture of SPDIF audio
10 - reg: Base address and address length of the IP core instance.
|
| /f-stack/dpdk/drivers/net/i40e/base/ |
| H A D | i40e_common.c | 657 I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
658 I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
659 I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
661 I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
662 I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
663 I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
747 I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
748 I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
749 I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY4),
751 I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/rtc/ |
| H A D | rtc-omap.txt | 5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/thermal/ |
| H A D | qcom-tsens.yaml | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15 three distinct major versions of the IP that is supported by a single driver.
16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
130 // Example 1 (legacy: for pre v1 IP):
148 // Example 2 (for any platform containing v1 of the TSENS IP):
166 // Example 3 (for any platform containing v2 of the TSENS IP):
|
| H A D | imx8mm-thermal.yaml | 13 i.MX8MM has TMU IP to allow temperature measurement, there are
14 currently two distinct major versions of the IP that is supported
15 by a single driver. The IP versions are named v1 and v2, v1 is
|
| /f-stack/freebsd/contrib/device-tree/Bindings/soc/mediatek/ |
| H A D | pwrap.txt | 11 IP Pairing
16 are marked with "IP Pairing". These are optional on SoCs which do not support
17 IP Pairing
33 "pwrap-bridge": bridge base (IP Pairing)
37 "pwrap-bridge" (IP Pairing)
|
| /f-stack/freebsd/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-demux-pinctrl.txt | 5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
7 IP core on the SoC. The most simple example is to fall back to GPIO bitbanging
8 if your current runtime configuration hits an errata of the internal IP core.
14 | |I2C IP Core1|--\ | +-----+ +-----+
18 | |I2C IP Core2|--/ |
|
| /f-stack/dpdk/doc/guides/prog_guide/ |
| H A D | ipsec_lib.rst | 25 * for outbound packets perform payload encryption, attach ICV, update/add IP headers, add ESP/AH h…
71 - remove outer IP header (tunnel mode) / update IP header (transport mode)
78 - add outer IP header (tunnel mode) / update IP header (transport mode)
103 - remove outer IP header (tunnel mode) / update IP header (transport mode)
110 - add outer IP header (tunnel mode) / update IP header (transport mode)
165 - or SPI and destination IP(DIP)
166 - or SPI, DIP and source IP(SIP)
176 required and IP protocol type (IPv4/IPv6).
|
| H A D | ip_fragment_reassembly_lib.rst | 4 IP Fragmentation and Reassembly Library
7 The IP Fragmentation and Reassembly Library implements IPv4 and IPv6 packet fragmentation and reass…
14 points to the start of the IP header of the packet (i.e. L2 header is already stripped out).
35 IP Fragment Table
40 Each IP packet is uniquely identified by triple <Source IP address>, <Destination IP address>, <ID>.
|