Searched refs:I40E_PFQF_HENA (Results 1 – 4 of 4) sorted by relevance
| /f-stack/dpdk/drivers/net/i40e/ |
| H A D | i40e_regs.h | 27 {I40E_PFQF_HENA(0), 1, 128, 0, 0, "PFQF_HENA"},
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| H A D | i40e_ethdev.c | 7581 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); in i40e_pf_disable_rss()
7582 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); in i40e_pf_disable_rss()
7688 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (uint32_t)hena); in i40e_hw_rss_hash_set()
7689 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (uint32_t)(hena >> 32)); in i40e_hw_rss_hash_set()
7704 hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)); in i40e_dev_rss_hash_update()
7705 hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1))) << 32; in i40e_dev_rss_hash_update()
7736 hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)); in i40e_dev_rss_hash_conf_get()
7737 hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1))) << 32; in i40e_dev_rss_hash_conf_get()
12490 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (uint32_t)hena); in i40e_rss_hash_set()
12491 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (uint32_t)(hena >> 32)); in i40e_rss_hash_set()
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| H A D | rte_pmd_i40e.c | 2949 hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)); in i40e_queue_region_pf_check_rss()
2950 hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1))) << 32; in i40e_queue_region_pf_check_rss()
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| /f-stack/dpdk/drivers/net/i40e/base/ |
| H A D | i40e_register.h | 2192 #define I40E_PFQF_HENA(_i) (0x00245900 + ((_i) * 128)) /* _i=0...1 */ /* Reset: CORER */ macro
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