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Searched refs:I40E_GLQF_HASH_MSK (Results 1 – 4 of 4) sorted by relevance

/f-stack/dpdk/drivers/net/i40e/
H A Di40e_regs.h36 {I40E_GLQF_HASH_MSK(0, 0), 1, 4, 63, 8, "GLQF_HASH_MSK"},
H A Drte_pmd_i40e.c3099 i40e_read_rx_ctl(hw, I40E_GLQF_HASH_MSK(0, pctype)); in rte_pmd_i40e_inset_get()
3101 i40e_read_rx_ctl(hw, I40E_GLQF_HASH_MSK(1, pctype)); in rte_pmd_i40e_inset_get()
3181 I40E_GLQF_HASH_MSK(i, pctype), in rte_pmd_i40e_inset_set()
H A Di40e_ethdev.c9587 I40E_GLQF_HASH_MSK(i, pctype), in i40e_filter_input_set_init()
9596 I40E_GLQF_HASH_MSK(i, pctype), in i40e_filter_input_set_init()
9676 i40e_check_write_global_reg(hw, I40E_GLQF_HASH_MSK(i, pctype), in i40e_hash_filter_inset_select()
9680 i40e_check_write_global_reg(hw, I40E_GLQF_HASH_MSK(i, pctype), in i40e_hash_filter_inset_select()
/f-stack/dpdk/drivers/net/i40e/base/
H A Di40e_register.h5186 #define I40E_GLQF_HASH_MSK(_i, _j) (0x00267A00 + ((_i) * 4 + (_j) * 8)) /* _i=0...1, _j=0...6… macro