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Searched refs:HDMI_NV_PDISP_SOR_PLL0 (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm/nvidia/drm2/
H A Dtegra_hdmi.c653 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, tmds->pll0); in tmds_init()
668 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_sor_start()
672 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_sor_start()
675 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_sor_start()
677 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_sor_start()
792 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_enable()
794 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_enable()
797 val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0); in hdmi_enable()
799 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val); in hdmi_enable()
H A Dtegra_hdmi_reg.h154 #define HDMI_NV_PDISP_SOR_PLL0 0x057 macro