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/f-stack/freebsd/contrib/dev/acpica/
H A Dacpica_prep.sh71 for H in ${src_headers}; do
73 xargs sed -i "" -e "s|[\"<]$H[\">]|\<contrib/dev/acpica/include/$H\>|g"
75 for H in ${comp_headers}; do
78 xargs sed -i "" -e "s|[\"<]$H[\">]|\<contrib/dev/acpica/compiler/$H\>|g"
80 for H in ${platform_headers}; do
82 xargs sed -i "" -e "s|[\"<]$H[\">]|\<contrib/dev/acpica/include/platform/$H\>|g"
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dstm32mp15-pinctrl.dtsi85 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
86 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
87 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
88 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
89 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
94 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
96 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
106 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
107 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
108 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
[all …]
/f-stack/freebsd/libkern/
H A Dashrdi3.c60 s = (aa.sl[H] >> (LONG_BITS - 1)) >> 1; in __ashrdi3()
62 aa.sl[H] >> (shift - LONG_BITS); in __ashrdi3()
63 aa.ul[H] = s; in __ashrdi3()
66 (aa.ul[H] << (LONG_BITS - shift)); in __ashrdi3()
67 aa.sl[H] >>= shift; in __ashrdi3()
H A Dcmpdi2.c53 return (aa.sl[H] < bb.sl[H] ? 0 : aa.sl[H] > bb.sl[H] ? 2 : in __cmpdi2()
H A Ducmpdi2.c52 return (aa.ul[H] < bb.ul[H] ? 0 : aa.ul[H] > bb.ul[H] ? 2 : in __ucmpdi2()
H A Dlshrdi3.c52 aa.ul[H] >> (shift - LONG_BITS); in __lshrdi3()
53 aa.ul[H] = 0; in __lshrdi3()
56 (aa.ul[H] << (LONG_BITS - shift)); in __lshrdi3()
57 aa.ul[H] >>= shift; in __lshrdi3()
H A Dqdivrem.c98 tmp.ul[H] = tmp.ul[L] = 1 / zero; in __qdivrem()
127 u[1] = HHALF(tmp.ul[H]); in __qdivrem()
128 u[2] = LHALF(tmp.ul[H]); in __qdivrem()
132 v[1] = HHALF(tmp.ul[H]); in __qdivrem()
133 v[2] = LHALF(tmp.ul[H]); in __qdivrem()
159 tmp.ul[H] = COMBINE(q1, q2); in __qdivrem()
267 tmp.ul[H] = COMBINE(uspace[1], uspace[2]); in __qdivrem()
272 tmp.ul[H] = COMBINE(qspace[1], qspace[2]); in __qdivrem()
H A Dashldi3.c54 aa.ul[H] = shift >= QUAD_BITS ? 0 :
58 aa.ul[H] = (aa.ul[H] << shift) |
/f-stack/freebsd/crypto/aesni/
H A Daesni_ghash.c311 H = _mm_shuffle_epi8(H, BSWAP_MASK); in AES_GCM_encrypt()
318 H = _mm_shuffle_epi8(H, BSWAP_MASK); in AES_GCM_encrypt()
347 gfmul(H,H,&H2); in AES_GCM_encrypt()
378 gfmul(X,H,&X); in AES_GCM_encrypt()
495 gfmul(X,H,&X); in AES_GCM_encrypt()
523 gfmul(X,H,&X); in AES_GCM_encrypt()
571 H = _mm_shuffle_epi8(H, BSWAP_MASK); in AES_GCM_decrypt()
578 H = _mm_shuffle_epi8(H, BSWAP_MASK); in AES_GCM_decrypt()
607 gfmul(H,H,&H2); in AES_GCM_decrypt()
639 gfmul(X,H,&X); in AES_GCM_decrypt()
[all …]
/f-stack/freebsd/crypto/
H A Dsha1.c137 a = H(0); b = H(1); c = H(2); d = H(3); e = H(4); in sha1_step()
166 H(0) = H(0) + a; in sha1_step()
167 H(1) = H(1) + b; in sha1_step()
168 H(2) = H(2) + c; in sha1_step()
169 H(3) = H(3) + d; in sha1_step()
170 H(4) = H(4) + e; in sha1_step()
181 H(0) = 0x67452301; in sha1_init()
182 H(1) = 0xefcdab89; in sha1_init()
183 H(2) = 0x98badcfe; in sha1_init()
184 H(3) = 0x10325476; in sha1_init()
[all …]
/f-stack/freebsd/crypto/openssl/arm/
H A Dghashv8-armx.S14 vld1.64 {q9},[r1] @ load input H
27 vorr q3,q3,q10 @ H<<<=1
28 veor q12,q3,q8 @ twisted H
31 @ calculate H^2
65 vld1.64 {q12,q13},[r1] @ load twisted H, ...
75 .byte 0xa2,0x2e,0xaa,0xf2 @ pmull q1,q13,q9 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
121 vld1.64 {q12,q13},[r1]! @ load twisted H, ..., H^2
140 .byte 0x8e,0x8e,0xa8,0xf2 @ pmull q4,q12,q7 @ H·Ii+1
156 .byte 0xa5,0x2e,0xab,0xf2 @ pmull2 q1,q13,q10 @ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
181 .byte 0x8e,0x8e,0xa8,0xf2 @ pmull q4,q12,q7 @ H·Ii+1
[all …]
/f-stack/app/nginx-1.16.1/src/core/
H A Dngx_md5.c124 #define H(x, y, z) ((x) ^ (y) ^ (z)) macro
232 STEP(H, a, b, c, d, GET(5), 0xfffa3942, 4); in ngx_md5_body()
233 STEP(H, d, a, b, c, GET(8), 0x8771f681, 11); in ngx_md5_body()
234 STEP(H, c, d, a, b, GET(11), 0x6d9d6122, 16); in ngx_md5_body()
235 STEP(H, b, c, d, a, GET(14), 0xfde5380c, 23); in ngx_md5_body()
236 STEP(H, a, b, c, d, GET(1), 0xa4beea44, 4); in ngx_md5_body()
237 STEP(H, d, a, b, c, GET(4), 0x4bdecfa9, 11); in ngx_md5_body()
238 STEP(H, c, d, a, b, GET(7), 0xf6bb4b60, 16); in ngx_md5_body()
239 STEP(H, b, c, d, a, GET(10), 0xbebfbc70, 23); in ngx_md5_body()
240 STEP(H, a, b, c, d, GET(13), 0x289b7ec6, 4); in ngx_md5_body()
[all …]
/f-stack/dpdk/examples/pipeline/examples/
H A Dvxlan_table.txt1 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(0) vxlan_reserved2 N(0) port_out H(0)
2 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(1) vxlan_reserved2 N(0) port_out H(1)
3 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(2) vxlan_reserved2 N(0) port_out H(2)
4 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(3) vxlan_reserved2 N(0) port_out H(3)
5 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(4) vxlan_reserved2 N(0) port_out H(0)
6 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(5) vxlan_reserved2 N(0) port_out H(1)
7 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(6) vxlan_reserved2 N(0) port_out H(2)
8 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(7) vxlan_reserved2 N(0) port_out H(3)
9 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(8) vxlan_reserved2 N(0) port_out H(0)
10 …hecksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(9) vxlan_reserved2 N(0) port_out H(1)
[all …]
/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c209 #define H(n) ((1 * 32) + (n)) macro
245 GATE(MC, "mem", "clk_m", H(0)),
248 GATE(KBC, "kbc", "clk_s", H(4)),
251 GATE(FUSE, "fuse", "clk_m", H(7)),
252 GATE(KFUSE, "kfuse", "clk_m", H(8)),
260 GATE(MIPI, "hsi", "pc_hsi", H(18)),
267 GATE(USB2, "usb2", "clk_m", H(26)),
268 GATE(USB3, "usb3", "clk_m", H(27)),
269 GATE(VDE, "vde", "pc_vde", H(29)),
270 GATE(BSEA, "bsea", "clk_m", H(30)),
[all …]
/f-stack/freebsd/sys/
H A Dpmclog.h282 #define PMCLOG_HEADER_TO_LENGTH(H) \ argument
283 ((H) & 0x0000FFFF)
284 #define PMCLOG_HEADER_TO_TYPE(H) \ argument
285 (((H) & 0x00FF0000) >> 16)
286 #define PMCLOG_HEADER_TO_MAGIC(H) \ argument
287 (((H) & 0xFF000000) >> 24)
288 #define PMCLOG_HEADER_CHECK_MAGIC(H) \ argument
289 (PMCLOG_HEADER_TO_MAGIC(H) == PMCLOG_HEADER_MAGIC)
/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_aead/aes256gcm/aesni/
H A Daead_aes256gcm_aesni.c55 CRYPTO_ALIGN(16) unsigned char H[16];
312 #define RED_DECL(a) __m128i H##a##_X##a##_lo, H##a##_X##a##_hi, tmp##a, tmp##a##B
314 #define RED_MUL_LOW(a) H##a##_X##a##_lo = _mm_clmulepi64_si128(H##a, X##a, 0x00)
315 #define RED_MUL_HIGH(a) H##a##_X##a##_hi = _mm_clmulepi64_si128(H##a, X##a, 0x11)
494 unsigned char *H = ctx->H; in crypto_aead_aes256gcm_beforenm() local
498 aesni_encrypt1(H, zero, rkeys); in crypto_aead_aes256gcm_beforenm()
526 memcpy(H, ctx->H, sizeof H); in crypto_aead_aes256gcm_encrypt_detached_afternm()
542 _mm_store_si128((__m128i *) H, Hv); in crypto_aead_aes256gcm_encrypt_detached_afternm()
612 addmul(accum, fb, 16, H); in crypto_aead_aes256gcm_encrypt_detached_afternm()
682 memcpy(H, ctx->H, sizeof H); in crypto_aead_aes256gcm_decrypt_detached_afternm()
[all …]
/f-stack/freebsd/libkern/arm/
H A Dmuldi3.c115 #define u1 u.ul[H] in __muldi3()
117 #define v1 v.ul[H] in __muldi3()
165 prod.ul[H] = high + (negmid ? -mid : mid) + low.ul[L] + in __muldi3()
166 low.ul[H]; in __muldi3()
248 prod.ul[H] = prodh; in __lmulq()
/f-stack/freebsd/crypto/armv8/
H A Darmv8_crypto.c277 __uint128_val_t H; in armv8_crypto_cipher_setup() local
312 memset(H.c, 0, sizeof(H.c)); in armv8_crypto_cipher_setup()
313 aes_v8_encrypt(H.c, H.c, &ses->enc_schedule); in armv8_crypto_cipher_setup()
314 H.u[0] = bswap64(H.u[0]); in armv8_crypto_cipher_setup()
315 H.u[1] = bswap64(H.u[1]); in armv8_crypto_cipher_setup()
316 gcm_init_v8(ses->Htable, H.u); in armv8_crypto_cipher_setup()
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_clk_per.c261 #define H(n) ((1 * 32) + (n)) macro
269 #define TEGRA210_CLK_STAT_MON H(5)
336 GATE(MC, "mem", "clk_m", H(0)),
340 GATE(PMC, "pmc", "clk_s", H(6)),
341 GATE(FUSE, "fuse", "clk_m", H(7)),
342 GATE(KFUSE, "kfuse", "clk_m", H(8)),
343 GATE(SBC1, "spi1", "pc_spi1", H(9)),
344 GATE(SBC2, "spi2", "pc_spi2", H(12)),
352 GATE(EMC, "emc", "pc_emc", H(25)),
353 GATE(USB2, "usb2", "clk_m", H(26)),
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/media/
H A Dallegro.txt2 ZynqMP SoC. The IP core may either be a H.264/H.265 encoder or H.264/H.265
/f-stack/freebsd/contrib/openzfs/module/icp/algs/sha1/
H A Dsha1.c81 #define H(b, c, d) (((b) & (c)) | (((b)|(c)) & (d))) macro
629 e = ROTATE_LEFT(a, 5) + H(b, c, d) + e + W(8) + SHA1_CONST(2);
633 d = ROTATE_LEFT(e, 5) + H(a, b, c) + d + W(9) + SHA1_CONST(2);
661 b = ROTATE_LEFT(c, 5) + H(d, e, a) + b + W(0) + SHA1_CONST(2);
665 a = ROTATE_LEFT(b, 5) + H(c, d, e) + a + W(1) + SHA1_CONST(2);
669 e = ROTATE_LEFT(a, 5) + H(b, c, d) + e + W(2) + SHA1_CONST(2);
673 d = ROTATE_LEFT(e, 5) + H(a, b, c) + d + W(3) + SHA1_CONST(2);
677 c = ROTATE_LEFT(d, 5) + H(e, a, b) + c + W(4) + SHA1_CONST(2);
681 b = ROTATE_LEFT(c, 5) + H(d, e, a) + b + W(5) + SHA1_CONST(2);
685 a = ROTATE_LEFT(b, 5) + H(c, d, e) + a + W(6) + SHA1_CONST(2);
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dcs35l33.txt43 Optional H/G Algorithm sub-node:
46 the internal H/G Algorithm.
48 - cirrus,hg-algo : Sub-node for internal Class H/G algorithm that
53 - cirrus,mem-depth : Memory depth for the Class H/G algorithm measured in
66 - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G
70 - cirrus,ldo-entry-delay : The LDO entry delay in milliseconds before the H/G
75 - cirrus,vp-hg-auto : This is a boolean property. When set, class H/G VPhg
78 - cirrus,vp-hg : Class H/G algorithm VPhg. Controls the H/G algorithm's
H A Dcs35l35.txt69 Optional H/G Algorithm sub-node:
72 that will disable automatic control of the internal H/G Algorithm.
75 or using these Class H Algorithm controls over the internal Algorithm.
78 - cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm
79 See Section 4.3 Internal Class H Algorithm in the Datasheet.
84 Section 7.29 Class H Control
89 Section 7.30 Class H Headroom Control
92 Section 7.31 Class H Release Rate
95 Section 7.32 Class H Weak FET Drive Control
100 Section 7.34 Class H VP Control
/f-stack/freebsd/contrib/openzfs/contrib/bash_completion.d/
H A Dzfs60 $__ZFS_CMD list -H -o name -s name -t filesystem,volume "$@"
65 $__ZFS_CMD list -H -o name -s name -t filesystem
73 $__ZFS_CMD list -H -o name -s name -t snapshot -d 1 $base_dataset
77 $__ZFS_CMD list -H -o name -s name -t filesystem -r $cur | tail -n +2
115 $__ZFS_CMD list -H -o name -s name -t snapshot -d 1 $base_dataset
117 $__ZFS_CMD list -H -o name -s name -t bookmark -d 1 $base_dataset
120 $__ZFS_CMD list -H -o name -s name -t filesystem,volume
153 $__ZFS_CMD list -H -o name -s name -t volume
293 if ! __zfs_complete_switch "H,r,p,d,o,t,s"
326 if ! __zfs_complete_switch "H,r,d,o,t,s,S"
[all …]
/f-stack/tools/libxo/tests/xo/
H A DMakefile.am34 ${addprefix saved/, ${TEST_CASES:.sh=.H.err}} \
35 ${addprefix saved/, ${TEST_CASES:.sh=.H.out}} \
53 TEST_FORMATS = T XP JP HP X J H HIPx

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