Home
last modified time | relevance | path

Searched refs:EFX_BAR_WRITEO (Results 1 – 9 of 9) sorted by relevance

/f-stack/dpdk/drivers/common/sfc_efx/base/
H A Dsiena_sram.c29 EFX_BAR_WRITEO(enp, FR_AZ_SRM_TX_DC_CFG_REG, &oword); in siena_sram_init()
32 EFX_BAR_WRITEO(enp, FR_AZ_TX_DC_CFG_REG, &oword); in siena_sram_init()
36 EFX_BAR_WRITEO(enp, FR_AZ_SRM_RX_DC_CFG_REG, &oword); in siena_sram_init()
39 EFX_BAR_WRITEO(enp, FR_AZ_RX_DC_CFG_REG, &oword); in siena_sram_init()
43 EFX_BAR_WRITEO(enp, FR_AZ_RX_DC_PF_WM_REG, &oword); in siena_sram_init()
47 EFX_BAR_WRITEO(enp, FR_AZ_SRM_UPD_EVQ_REG, &oword); in siena_sram_init()
69 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_CFG_REG, &oword); in siena_sram_test()
77 EFX_BAR_WRITEO(enp, FR_AZ_SRM_RX_DC_CFG_REG, &oword); in siena_sram_test()
80 EFX_BAR_WRITEO(enp, FR_AZ_SRM_TX_DC_CFG_REG, &oword); in siena_sram_test()
132 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_CFG_REG, &oword); in siena_sram_test()
[all …]
H A Defx_intr.c339 EFX_BAR_WRITEO(enp, FR_AZ_FATAL_INTR_REG_KER, &oword); in siena_intr_init()
346 EFX_BAR_WRITEO(enp, FR_AZ_INT_ADR_REG_KER, &oword); in siena_intr_init()
367 EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); in siena_intr_enable()
378 EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); in siena_intr_disable()
424 EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); in siena_intr_trigger()
439 EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); in siena_intr_trigger()
582 EFX_BAR_WRITEO(enp, FR_AZ_INT_ADR_REG_KER, &oword); in siena_intr_fini()
H A Defx_sram.c70 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); in efx_sram_buf_tbl_set()
128 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); in efx_sram_buf_tbl_set()
171 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); in efx_sram_buf_tbl_clear()
H A Defx_rx.c1106 EFX_BAR_WRITEO(enp, FR_AZ_RX_CFG_REG, &oword); in siena_rx_init()
1153 EFX_BAR_WRITEO(enp, FR_AZ_RX_CFG_REG, &oword); in siena_rx_scatter_enable()
1158 EFX_BAR_WRITEO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword); in siena_rx_scatter_enable()
1182 EFX_BAR_WRITEO((_enp), FR_AZ_RX_CFG_REG, &oword); \
1189 EFX_BAR_WRITEO((_enp), FR_CZ_RX_RSS_IPV6_REG3, \
1208 EFX_BAR_WRITEO((_enp), FR_AZ_RX_CFG_REG, &oword); \
1315 EFX_BAR_WRITEO(enp, FR_BZ_RX_RSS_TKEY_REG, &oword); in siena_rx_scale_key_set()
1343 EFX_BAR_WRITEO(enp, FR_CZ_RX_RSS_IPV6_REG3, &oword); in siena_rx_scale_key_set()
1353 EFX_BAR_WRITEO(enp, FR_CZ_RX_RSS_IPV6_REG2, &oword); in siena_rx_scale_key_set()
1363 EFX_BAR_WRITEO(enp, FR_CZ_RX_RSS_IPV6_REG1, &oword); in siena_rx_scale_key_set()
[all …]
H A Dsiena_nic.c331 EFX_BAR_WRITEO(enp, FR_AZ_ADR_REGION_REG, &oword); in siena_nic_probe()
477 EFX_BAR_WRITEO(enp, FR_AZ_RX_CFG_REG, &oword); in siena_nic_rx_cfg()
482 EFX_BAR_WRITEO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword); in siena_nic_rx_cfg()
492 EFX_BAR_WRITEO(enp, FR_CZ_USR_EV_CFG, &oword); in siena_nic_usrev_dis()
H A Defx_tx.c773 EFX_BAR_WRITEO(enp, FR_AZ_TX_RESERVED_REG, &oword); in siena_tx_init()
781 EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword); in siena_tx_init()
935 EFX_BAR_WRITEO(enp, FR_AZ_TX_FLUSH_DESCQ_REG, &oword); in siena_tx_qflush()
H A Defx_ev.c613 EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword); in siena_ev_init()
1221 EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword); in siena_ev_qpost()
H A Defx_filter.c997 EFX_BAR_WRITEO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword); in siena_filter_push_rx_limits()
1039 EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword); in siena_filter_push_tx_limits()
H A Defx_impl.h1154 #define EFX_BAR_WRITEO(_enp, _reg, _eop) \ macro