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Searched refs:DP (Results 1 – 23 of 23) sorted by relevance

/f-stack/freebsd/contrib/device-tree/Bindings/display/bridge/
H A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3 STDP2690-ge-b850v3-fw bridges (DP-DP++)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
H A Dtoshiba,tc358767.txt17 to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
20 - port@2: eDP/DP output port
H A Dps8622.txt10 - lane-count: number of DP lanes to use
/f-stack/freebsd/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dp.txt8 For the DP-PHY initialization, we use the dptx-phy node.
11 Base address of DP PHY register.
13 The bit-mask used to enable/disable DP PHY.
52 For the below properties, please refer to Analogix DP binding document:
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dqcom,sc7180-dispcc.yaml28 - description: Link clock from DP PHY
29 - description: VCO DIV clock from DP PHY
H A Dqcom,sdm845-dispcc.yaml34 - description: Link clock from DP PHY
35 - description: VCO DIV clock from DP PHY
/f-stack/freebsd/kern/
H A Duipc_sem.c92 #define DP(x) printf x macro
94 #define DP(x) macro
643 DP((">>> ksem_open start, pid=%d\n", (int)td->td_proc->p_pid)); in sys_ksem_open()
818 DP((">>> kern_sem_wait entered! pid=%d\n", (int)td->td_proc->p_pid)); in kern_sem_wait()
826 DP((">>> kern_sem_wait critical section entered! pid=%d\n", in kern_sem_wait()
831 DP(("kern_sem_wait mac failed\n")); in kern_sem_wait()
835 DP(("kern_sem_wait value = %d, tryflag %d\n", ks->ks_value, tryflag)); in kern_sem_wait()
864 DP(("kern_sem_wait value post-decrement = %d\n", ks->ks_value)); in kern_sem_wait()
869 DP(("<<< kern_sem_wait leaving, pid=%d, error = %d\n", in kern_sem_wait()
/f-stack/freebsd/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a-kontron-sl28.dts102 label = "failsafe DP firmware";
130 label = "DP firmware";
/f-stack/freebsd/contrib/device-tree/Bindings/display/
H A Darm,malidp.txt1 ARM Mali-DP
31 - port: The Mali DP connection to an encoder input port. The connection
/f-stack/freebsd/contrib/device-tree/Bindings/phy/
H A Dmxs-usb-phy.txt22 that terminates the DP output signal. Default: 45
H A Dxlnx,zynqmp-psgtr.yaml35 maximum: 1 # for DP, SATA or USB
H A Dphy-rockchip-typec.txt24 * "dp-port" : the name of DP port.
H A Dqcom,qmp-usb3-dp-phy.yaml8 title: Qualcomm QMP USB3 DP PHY controller
/f-stack/freebsd/contrib/device-tree/Bindings/display/msm/
H A Ddpu.txt6 sub-blocks like DPU display controller, DSI and DP interfaces etc.
58 to interfaces that are external to the DPU hardware, such as DSI, DP etc.
/f-stack/freebsd/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-cheza.dtsi762 * - The only source of DP is the single native Type C port.
763 * - On cheza we want to be able to hook DP up to _either_ of the
764 * two Type C connectors and want to be able to achieve 4 lanes of DP.
765 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
767 * configured as 4-lanes DP so it's always available.
786 * We always need the high speed pins as 4-lanes DP in case someone
787 * hotplugs a DP peripheral. Thus limit this port to a max of high
/f-stack/freebsd/contrib/device-tree/Bindings/display/rockchip/
H A Dcdn-dp-rockchip.txt20 - assigned-clock-rates : the DP core clk frequency, shall be: 100000000
H A Danalogix_dp-rockchip.txt37 For the below properties, please refer to Analogix DP binding document:
/f-stack/freebsd/contrib/device-tree/Bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml115 description: PHYs for the DP data lanes
/f-stack/freebsd/contrib/device-tree/Bindings/usb/
H A Dqcom,dwc3.yaml87 - description: Wakeup event on DP line.
/f-stack/freebsd/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zcu102-revA.dts209 output-low; /* PCIE = 0, DP = 1 */
215 output-high; /* PCIE = 0, DP = 1 */
/f-stack/freebsd/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186-p2771-0000.dts272 /* DP on E3320 */
/f-stack/freebsd/arm64/arm64/
H A Didentcpu.c397 MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR0, DP, NONE, IMPL),
453 MRS_FIELD(ID_AA64ISAR0, DP, false, MRS_LOWER, id_aa64isar0_dp),
/f-stack/freebsd/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt51 - 1 9 GOP DP