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Searched refs:DIVIDE_AND_ROUND_UP (Results 1 – 7 of 7) sorted by relevance

/f-stack/dpdk/drivers/net/ice/base/
H A Dice_acl_ctrl.c111 num_stack_level = DIVIDE_AND_ROUND_UP(num_stack_level, in ice_acl_tbl_calc_end_idx()
260 stack_level = DIVIDE_AND_ROUND_UP(tbl->info.depth, in ice_acl_divide_act_mems_to_tcams()
264 num_cscd = DIVIDE_AND_ROUND_UP(tbl->info.width, in ice_acl_divide_act_mems_to_tcams()
336 if ((DIVIDE_AND_ROUND_UP(depth, ICE_AQC_ACL_TCAM_DEPTH) * in ice_acl_create_tbl()
436 width = DIVIDE_AND_ROUND_UP(req->width, ICE_AQC_ACL_KEY_WIDTH_BYTES); in ice_acl_alloc_partition()
573 cascade_cnt = DIVIDE_AND_ROUND_UP(scen->width, in ice_acl_fill_tcam_select()
759 DIVIDE_AND_ROUND_UP(match_width, ICE_AQC_ACL_KEY_WIDTH_BYTES); in ice_acl_create_scen()
769 cascade_cnt = DIVIDE_AND_ROUND_UP(scen->width, in ice_acl_create_scen()
990 num_cscd = DIVIDE_AND_ROUND_UP(scen->width, in ice_acl_add_entry()
1063 num_cscd = DIVIDE_AND_ROUND_UP(scen->width, in ice_acl_prog_act()
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H A Dice_osdep.h397 #ifndef DIVIDE_AND_ROUND_UP
398 #define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) macro
H A Dice_bitops.h16 #define BITS_TO_CHUNKS(sz) DIVIDE_AND_ROUND_UP((sz), BITS_PER_CHUNK)
H A Dice_flow.c1213 cnt = DIVIDE_AND_ROUND_UP(flds[fld].xtrct.disp + in ice_flow_xtract_fld()
1298 cnt = DIVIDE_AND_ROUND_UP(raw->info.xtrct.disp + in ice_flow_xtract_raws()
1434 if (DIVIDE_AND_ROUND_UP(ice_flds_info[j].size + in ice_flow_acl_def_entry_frmt()
1450 fld->entry.last = DIVIDE_AND_ROUND_UP in ice_flow_acl_def_entry_frmt()
H A Dice_type.h31 #define ROUND_UP(a, b) ((b) * DIVIDE_AND_ROUND_UP((a), (b)))
H A Dice_sched.c1632 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]); in ice_sched_calc_vsi_child_nodes()
H A Dice_flex_pipe.c4657 u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); in ice_add_prof()