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Searched refs:DIV7_1 (Results 1 – 3 of 3) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_car.c80 #define DIV7_1(_id, cname, plist, o, s) \ macro
267 DIV7_1(0, "pllC_out1_div", "pllC_out0", PLLC_OUT, 2),
268 DIV7_1(0, "pllM_out1_div", "pllM_out0", PLLM_OUT, 8),
269 DIV7_1(0, "pllP_outX0_div", "pllP_out0", PLLP_RESHIFT, 2),
270 DIV7_1(0, "pllP_out1_div", "pllP_out0", PLLP_OUTA, 8),
271 DIV7_1(0, "pllP_out2_div", "pllP_out0", PLLP_OUTA, 24),
272 DIV7_1(0, "pllP_out3_div", "pllP_out0", PLLP_OUTB, 8),
273 DIV7_1(0, "pllP_out4_div", "pllP_out0", PLLP_OUTB, 24),
274 DIV7_1(0, "pllP_out5_div", "pllP_out0", PLLP_OUTC, 24),
275 DIV7_1(0, "pllA_out1_div", "pllA_out", PLLA_OUT, 8),
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_clk_pll.c168 #define DIV7_1(_id, cname, plist, o, s) \ macro
546 DIV7_1(0, "pllC_out1_div", "pllC_out0", PLLC_OUT, 8),
548 DIV7_1(0, "pllP_out1_div", "pllP_out0", PLLP_OUTA, 8),
550 DIV7_1(0, "pllP_out3_div", "pllP_out0", PLLP_OUTB, 8),
551 DIV7_1(0, "pllP_out4_div", "pllP_out0", PLLP_OUTB, 24),
552 DIV7_1(0, "pllP_out5_div", "pllP_out0", PLLP_OUTC, 24),
555 DIV7_1(0, "pllU_out1_div", "pllU_out0", PLLU_OUTA, 8),
556 DIV7_1(0, "pllU_out2_div", "pllU_out0", PLLU_OUTA, 24),
559 DIV7_1(0, "pllREFE_out1_div", "pllREFE", PLLREFE_OUT, 8),
563 DIV7_1(0, "pllC4_out3_div", "pllC4_out0", PLLC4_OUT, 8),
[all …]
H A Dtegra210_car.c81 #define DIV7_1(_id, cname, plist, o, s) \ macro