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Searched refs:CVMX_ADD_IO_SEG (Results 1 – 25 of 63) sorted by relevance

123

/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-pexp-defs.h70 return CVMX_ADD_IO_SEG(0x00011F0000008580ull); in CVMX_PEXP_NPEI_BIST_STATUS_FUNC()
81 return CVMX_ADD_IO_SEG(0x00011F0000008680ull); in CVMX_PEXP_NPEI_BIST_STATUS2_FUNC()
92 return CVMX_ADD_IO_SEG(0x00011F0000008250ull); in CVMX_PEXP_NPEI_CTL_PORT0_FUNC()
103 return CVMX_ADD_IO_SEG(0x00011F0000008260ull); in CVMX_PEXP_NPEI_CTL_PORT1_FUNC()
114 return CVMX_ADD_IO_SEG(0x00011F0000008570ull); in CVMX_PEXP_NPEI_CTL_STATUS_FUNC()
125 return CVMX_ADD_IO_SEG(0x00011F000000BC00ull); in CVMX_PEXP_NPEI_CTL_STATUS2_FUNC()
136 return CVMX_ADD_IO_SEG(0x00011F00000085F0ull); in CVMX_PEXP_NPEI_DATA_OUT_CNT_FUNC()
147 return CVMX_ADD_IO_SEG(0x00011F0000008510ull); in CVMX_PEXP_NPEI_DBG_DATA_FUNC()
158 return CVMX_ADD_IO_SEG(0x00011F0000008500ull); in CVMX_PEXP_NPEI_DBG_SELECT_FUNC()
169 return CVMX_ADD_IO_SEG(0x00011F00000085C0ull); in CVMX_PEXP_NPEI_DMA0_INT_LEVEL_FUNC()
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H A Dcvmx-endor-defs.h61 return CVMX_ADD_IO_SEG(0x00010F0000844004ull); in CVMX_ENDOR_ADMA_AUTO_CLK_GATE_FUNC()
72 return CVMX_ADD_IO_SEG(0x00010F0000844044ull); in CVMX_ENDOR_ADMA_AXIERR_INTR_FUNC()
83 return CVMX_ADD_IO_SEG(0x00010F0000844050ull); in CVMX_ENDOR_ADMA_AXI_RSPCODE_FUNC()
94 return CVMX_ADD_IO_SEG(0x00010F0000844084ull); in CVMX_ENDOR_ADMA_AXI_SIGNAL_FUNC()
105 return CVMX_ADD_IO_SEG(0x00010F0000844040ull); in CVMX_ENDOR_ADMA_DMADONE_INTR_FUNC()
160 return CVMX_ADD_IO_SEG(0x00010F0000844080ull); in CVMX_ENDOR_ADMA_DMA_PRIORITY_FUNC()
171 return CVMX_ADD_IO_SEG(0x00010F0000844008ull); in CVMX_ENDOR_ADMA_DMA_RESET_FUNC()
182 return CVMX_ADD_IO_SEG(0x00010F000084404Cull); in CVMX_ENDOR_ADMA_INTR_DIS_FUNC()
193 return CVMX_ADD_IO_SEG(0x00010F0000844048ull); in CVMX_ENDOR_ADMA_INTR_ENB_FUNC()
204 return CVMX_ADD_IO_SEG(0x00010F0000844000ull); in CVMX_ENDOR_ADMA_MODULE_STATUS_FUNC()
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H A Dcvmx-pcsx-defs.h60 …return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_ADV_REG()
65 …return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + (((offset) & 3) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_ADV_REG()
71 …return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + (((offset) & 3) + ((block_id) & 1) * 0x20000ull) *… in CVMX_PCSX_ANX_ADV_REG()
75 …return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + (((offset) & 3) + ((block_id) & 7) * 0x4000ull) * … in CVMX_PCSX_ANX_ADV_REG()
79 …return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_ADV_REG()
101 …return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + (((offset) & 3) + ((block_id) & 7) * 0x4000ull) * … in CVMX_PCSX_ANX_EXT_ST_REG()
105 …return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_EXT_ST_REG()
131 …return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_LP_ABIL_REG()
157 …return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_ANX_RESULTS_REG()
183 …return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + (((offset) & 1) + ((block_id) & 0) * 0x20000ull) *… in CVMX_PCSX_INTX_EN_REG()
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H A Dcvmx-gmxx-defs.h65 return CVMX_ADD_IO_SEG(0x0001180008000518ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_BAD_REG()
73 return CVMX_ADD_IO_SEG(0x0001180008000518ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_GMXX_BAD_REG()
81 return CVMX_ADD_IO_SEG(0x0001180008000518ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_BAD_REG()
109 return CVMX_ADD_IO_SEG(0x0001180008000400ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_BIST()
128 return CVMX_ADD_IO_SEG(0x0001180008000700ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_GMXX_BPID_MSK()
154 return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_CLK_EN()
162 return CVMX_ADD_IO_SEG(0x0001180008000608ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_GMXX_EBP_DIS()
173 return CVMX_ADD_IO_SEG(0x0001180008000600ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_GMXX_EBP_MSK()
199 return CVMX_ADD_IO_SEG(0x0001180008000550ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_HG2_CONTROL()
227 return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_GMXX_INF_MODE()
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H A Dcvmx-pcsxx-defs.h62 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
67 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + ((block_id) & 0) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
71 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
75 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
97 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
119 return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_BIT_LOCK_STATUS_REG()
141 return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_CONTROL1_REG()
163 return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_CONTROL2_REG()
185 return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_INT_EN_REG()
207 return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + ((block_id) & 7) * 0x1000000ull; in CVMX_PCSXX_INT_REG()
[all …]
H A Dcvmx-sso-defs.h61 return CVMX_ADD_IO_SEG(0x00016700000010E8ull); in CVMX_SSO_ACTIVE_CYCLES_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001670000001078ull); in CVMX_SSO_BIST_STAT_FUNC()
83 return CVMX_ADD_IO_SEG(0x0001670000001088ull); in CVMX_SSO_CFG_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001670000001070ull); in CVMX_SSO_DS_PC_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001670000001038ull); in CVMX_SSO_ERR_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001670000001030ull); in CVMX_SSO_ERR_ENB_FUNC()
127 return CVMX_ADD_IO_SEG(0x00016700000010D0ull); in CVMX_SSO_FIDX_ECC_CTL_FUNC()
138 return CVMX_ADD_IO_SEG(0x00016700000010D8ull); in CVMX_SSO_FIDX_ECC_ST_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001670000001090ull); in CVMX_SSO_FPAGE_CNT_FUNC()
160 return CVMX_ADD_IO_SEG(0x0001670000001098ull); in CVMX_SSO_GWE_CFG_FUNC()
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H A Dcvmx-led-defs.h61 return CVMX_ADD_IO_SEG(0x0001180000001A48ull); in CVMX_LED_BLINK_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001180000001A08ull); in CVMX_LED_CLK_PHASE_FUNC()
83 return CVMX_ADD_IO_SEG(0x0001180000001AF8ull); in CVMX_LED_CYLON_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001180000001A18ull); in CVMX_LED_DBG_FUNC()
97 #define CVMX_LED_DBG (CVMX_ADD_IO_SEG(0x0001180000001A18ull))
105 return CVMX_ADD_IO_SEG(0x0001180000001A00ull); in CVMX_LED_EN_FUNC()
108 #define CVMX_LED_EN (CVMX_ADD_IO_SEG(0x0001180000001A00ull))
116 return CVMX_ADD_IO_SEG(0x0001180000001A50ull); in CVMX_LED_POLARITY_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180000001A10ull); in CVMX_LED_PRT_FUNC()
130 #define CVMX_LED_PRT (CVMX_ADD_IO_SEG(0x0001180000001A10ull))
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H A Dcvmx-eoi-defs.h61 return CVMX_ADD_IO_SEG(0x0001180013000118ull); in CVMX_EOI_BIST_CTL_STA_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001180013000000ull); in CVMX_EOI_CTL_STA_FUNC()
83 return CVMX_ADD_IO_SEG(0x0001180013000020ull); in CVMX_EOI_DEF_STA0_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001180013000028ull); in CVMX_EOI_DEF_STA1_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001180013000030ull); in CVMX_EOI_DEF_STA2_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180013000110ull); in CVMX_EOI_ECC_CTL_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180013000120ull); in CVMX_EOI_ENDOR_BISTR_CTL_STA_FUNC()
138 return CVMX_ADD_IO_SEG(0x0001180013000038ull); in CVMX_EOI_ENDOR_CLK_CTL_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001180013000100ull); in CVMX_EOI_ENDOR_CTL_FUNC()
160 return CVMX_ADD_IO_SEG(0x0001180013000010ull); in CVMX_EOI_INT_ENA_FUNC()
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H A Dcvmx-tim-defs.h61 return CVMX_ADD_IO_SEG(0x0001180058000020ull); in CVMX_TIM_BIST_RESULT_FUNC()
72 return CVMX_ADD_IO_SEG(0x00011800580000A0ull); in CVMX_TIM_DBG2_FUNC()
83 return CVMX_ADD_IO_SEG(0x00011800580000A8ull); in CVMX_TIM_DBG3_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001180058000018ull); in CVMX_TIM_ECC_CFG_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001180058000010ull); in CVMX_TIM_FR_RN_TT_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180058000080ull); in CVMX_TIM_GPIO_EN_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180058000030ull); in CVMX_TIM_INT0_FUNC()
138 return CVMX_ADD_IO_SEG(0x0001180058000038ull); in CVMX_TIM_INT0_EN_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001180058000040ull); in CVMX_TIM_INT0_EVENT_FUNC()
160 return CVMX_ADD_IO_SEG(0x0001180058000060ull); in CVMX_TIM_INT_ECCERR_FUNC()
[all …]
H A Dcvmx-pcmx-defs.h65 return CVMX_ADD_IO_SEG(0x0001070000010018ull) + ((offset) & 3) * 16384; in CVMX_PCMX_DMA_CFG()
80 return CVMX_ADD_IO_SEG(0x0001070000010020ull) + ((offset) & 3) * 16384; in CVMX_PCMX_INT_ENA()
95 return CVMX_ADD_IO_SEG(0x0001070000010028ull) + ((offset) & 3) * 16384; in CVMX_PCMX_INT_SUM()
110 return CVMX_ADD_IO_SEG(0x0001070000010068ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXADDR()
125 return CVMX_ADD_IO_SEG(0x0001070000010060ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXCNT()
140 return CVMX_ADD_IO_SEG(0x00010700000100C0ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXMSK0()
155 return CVMX_ADD_IO_SEG(0x00010700000100C8ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXMSK1()
170 return CVMX_ADD_IO_SEG(0x00010700000100D0ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXMSK2()
185 return CVMX_ADD_IO_SEG(0x00010700000100D8ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXMSK3()
200 return CVMX_ADD_IO_SEG(0x00010700000100E0ull) + ((offset) & 3) * 16384; in CVMX_PCMX_RXMSK4()
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H A Dcvmx-stxx-defs.h62 return CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_ARB_CTL()
74 return CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_BCKPRS_CNT()
86 return CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_COM_CTL()
98 return CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_DIP_CNT()
110 return CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_IGN_CAL()
122 return CVMX_ADD_IO_SEG(0x00011800900006A0ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_INT_MSK()
134 return CVMX_ADD_IO_SEG(0x0001180090000698ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_INT_REG()
146 return CVMX_ADD_IO_SEG(0x00011800900006A8ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_INT_SYNC()
158 return CVMX_ADD_IO_SEG(0x0001180090000618ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_MIN_BST()
182 return CVMX_ADD_IO_SEG(0x0001180090000628ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_STXX_SPI4_DAT()
[all …]
H A Dcvmx-ilk-defs.h61 return CVMX_ADD_IO_SEG(0x0001180014000038ull); in CVMX_ILK_BIST_SUM_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001180014000000ull); in CVMX_ILK_GBL_CFG_FUNC()
75 #define CVMX_ILK_GBL_CFG (CVMX_ADD_IO_SEG(0x0001180014000000ull))
83 return CVMX_ADD_IO_SEG(0x0001180014000008ull); in CVMX_ILK_GBL_INT_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001180014000010ull); in CVMX_ILK_GBL_INT_EN_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001180014000030ull); in CVMX_ILK_INT_SUM_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180014030008ull); in CVMX_ILK_LNE_DBG_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180014030000ull); in CVMX_ILK_LNE_STS_MSG_FUNC()
138 return CVMX_ADD_IO_SEG(0x0001180014000020ull); in CVMX_ILK_RXF_IDX_PMAP_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001180014000028ull); in CVMX_ILK_RXF_MEM_PMAP_FUNC()
[all …]
H A Dcvmx-zip-defs.h61 return CVMX_ADD_IO_SEG(0x0001180038000080ull); in CVMX_ZIP_CMD_BIST_RESULT_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001180038000008ull); in CVMX_ZIP_CMD_BUF_FUNC()
83 return CVMX_ADD_IO_SEG(0x0001180038000000ull); in CVMX_ZIP_CMD_CTL_FUNC()
94 return CVMX_ADD_IO_SEG(0x00011800380000A0ull); in CVMX_ZIP_CONSTANTS_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180038000510ull); in CVMX_ZIP_CTL_BIST_STATUS_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180038000560ull); in CVMX_ZIP_CTL_CFG_FUNC()
171 return CVMX_ADD_IO_SEG(0x0001180038000098ull); in CVMX_ZIP_DEBUG0_FUNC()
182 return CVMX_ADD_IO_SEG(0x0001180038000568ull); in CVMX_ZIP_ECC_CTL_FUNC()
193 return CVMX_ADD_IO_SEG(0x0001180038000088ull); in CVMX_ZIP_ERROR_FUNC()
204 return CVMX_ADD_IO_SEG(0x0001180038000580ull); in CVMX_ZIP_INT_ENA_FUNC()
[all …]
H A Dcvmx-asxx-defs.h63 return CVMX_ADD_IO_SEG(0x00011800B0000180ull); in CVMX_ASXX_GMII_RX_CLK_SET()
76 return CVMX_ADD_IO_SEG(0x00011800B0000188ull); in CVMX_ASXX_GMII_RX_DAT_SET()
91 return CVMX_ADD_IO_SEG(0x00011800B0000018ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_INT_EN()
106 return CVMX_ADD_IO_SEG(0x00011800B0000010ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_INT_REG()
118 return CVMX_ADD_IO_SEG(0x00011800B0000190ull); in CVMX_ASXX_MII_RX_DAT_SET()
133 return CVMX_ADD_IO_SEG(0x00011800B0000040ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_PRT_LOOP()
145 return CVMX_ADD_IO_SEG(0x00011800B0000248ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_RLD_BYPASS()
157 return CVMX_ADD_IO_SEG(0x00011800B0000250ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_RLD_BYPASS_SETTING()
169 return CVMX_ADD_IO_SEG(0x00011800B0000220ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_RLD_COMP()
181 return CVMX_ADD_IO_SEG(0x00011800B0000218ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_ASXX_RLD_DATA_DRV()
[all …]
H A Dcvmx-uahcx-defs.h65 return CVMX_ADD_IO_SEG(0x00016F0000000028ull); in CVMX_UAHCX_EHCI_ASYNCLISTADDR()
80 return CVMX_ADD_IO_SEG(0x00016F0000000050ull); in CVMX_UAHCX_EHCI_CONFIGFLAG()
95 return CVMX_ADD_IO_SEG(0x00016F0000000020ull); in CVMX_UAHCX_EHCI_CTRLDSSEGMENT()
110 return CVMX_ADD_IO_SEG(0x00016F000000001Cull); in CVMX_UAHCX_EHCI_FRINDEX()
125 return CVMX_ADD_IO_SEG(0x00016F0000000000ull); in CVMX_UAHCX_EHCI_HCCAPBASE()
140 return CVMX_ADD_IO_SEG(0x00016F0000000008ull); in CVMX_UAHCX_EHCI_HCCPARAMS()
155 return CVMX_ADD_IO_SEG(0x00016F0000000004ull); in CVMX_UAHCX_EHCI_HCSPARAMS()
170 return CVMX_ADD_IO_SEG(0x00016F0000000090ull); in CVMX_UAHCX_EHCI_INSNREG00()
185 return CVMX_ADD_IO_SEG(0x00016F000000009Cull); in CVMX_UAHCX_EHCI_INSNREG03()
200 return CVMX_ADD_IO_SEG(0x00016F00000000A0ull); in CVMX_UAHCX_EHCI_INSNREG04()
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H A Dcvmx-dfm-defs.h61 return CVMX_ADD_IO_SEG(0x00011800D4000220ull); in CVMX_DFM_CHAR_CTL_FUNC()
72 return CVMX_ADD_IO_SEG(0x00011800D4000228ull); in CVMX_DFM_CHAR_MASK0_FUNC()
83 return CVMX_ADD_IO_SEG(0x00011800D4000238ull); in CVMX_DFM_CHAR_MASK2_FUNC()
94 return CVMX_ADD_IO_SEG(0x00011800D4000318ull); in CVMX_DFM_CHAR_MASK4_FUNC()
105 return CVMX_ADD_IO_SEG(0x00011800D40001B8ull); in CVMX_DFM_COMP_CTL2_FUNC()
116 return CVMX_ADD_IO_SEG(0x00011800D4000188ull); in CVMX_DFM_CONFIG_FUNC()
127 return CVMX_ADD_IO_SEG(0x00011800D4000190ull); in CVMX_DFM_CONTROL_FUNC()
138 return CVMX_ADD_IO_SEG(0x00011800D40001C8ull); in CVMX_DFM_DLL_CTL2_FUNC()
149 return CVMX_ADD_IO_SEG(0x00011800D4000218ull); in CVMX_DFM_DLL_CTL3_FUNC()
160 return CVMX_ADD_IO_SEG(0x00011800D40001E0ull); in CVMX_DFM_FCLK_CNT_FUNC()
[all …]
H A Dcvmx-smix-defs.h64 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 0) * 256; in CVMX_SMIX_CLK()
73 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256; in CVMX_SMIX_CLK()
77 return CVMX_ADD_IO_SEG(0x0001180000003818ull) + ((offset) & 3) * 128; in CVMX_SMIX_CLK()
81 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256; in CVMX_SMIX_CLK()
92 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 0) * 256; in CVMX_SMIX_CMD()
101 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256; in CVMX_SMIX_CMD()
105 return CVMX_ADD_IO_SEG(0x0001180000003800ull) + ((offset) & 3) * 128; in CVMX_SMIX_CMD()
109 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256; in CVMX_SMIX_CMD()
137 return CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256; in CVMX_SMIX_EN()
165 return CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256; in CVMX_SMIX_RD_DAT()
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H A Dcvmx-dpi-defs.h61 return CVMX_ADD_IO_SEG(0x0001DF0000000000ull); in CVMX_DPI_BIST_STATUS_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001DF0000000040ull); in CVMX_DPI_CTL_FUNC()
201 return CVMX_ADD_IO_SEG(0x0001DF0000000048ull); in CVMX_DPI_DMA_CONTROL_FUNC()
255 return CVMX_ADD_IO_SEG(0x0001DF0000000980ull); in CVMX_DPI_INFO_REG_FUNC()
266 return CVMX_ADD_IO_SEG(0x0001DF0000000010ull); in CVMX_DPI_INT_EN_FUNC()
277 return CVMX_ADD_IO_SEG(0x0001DF0000000008ull); in CVMX_DPI_INT_REG_FUNC()
291 return CVMX_ADD_IO_SEG(0x0001DF0000000800ull); in CVMX_DPI_NCBX_CFG()
302 return CVMX_ADD_IO_SEG(0x0001DF0000000830ull); in CVMX_DPI_PINT_INFO_FUNC()
313 return CVMX_ADD_IO_SEG(0x0001DF0000000078ull); in CVMX_DPI_PKT_ERR_RSP_FUNC()
324 return CVMX_ADD_IO_SEG(0x0001DF0000000058ull); in CVMX_DPI_REQ_ERR_RSP_FUNC()
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H A Dcvmx-spxx-defs.h62 return CVMX_ADD_IO_SEG(0x0001180090000340ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_BCKPRS_CNT()
74 return CVMX_ADD_IO_SEG(0x00011800900007F8ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_BIST_STAT()
86 return CVMX_ADD_IO_SEG(0x0001180090000348ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_CLK_CTL()
98 return CVMX_ADD_IO_SEG(0x0001180090000350ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_CLK_STAT()
110 return CVMX_ADD_IO_SEG(0x0001180090000368ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_DBG_DESKEW_CTL()
122 return CVMX_ADD_IO_SEG(0x0001180090000370ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_DBG_DESKEW_STATE()
134 return CVMX_ADD_IO_SEG(0x0001180090000358ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_DRV_CTL()
146 return CVMX_ADD_IO_SEG(0x0001180090000320ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_ERR_CTL()
158 return CVMX_ADD_IO_SEG(0x0001180090000318ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_INT_DAT()
170 return CVMX_ADD_IO_SEG(0x0001180090000308ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SPXX_INT_MSK()
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H A Dcvmx-npi-defs.h99 return CVMX_ADD_IO_SEG(0x00011F00000003F8ull); in CVMX_NPI_BIST_STATUS_FUNC()
129 return CVMX_ADD_IO_SEG(0x00011F0000000218ull); in CVMX_NPI_COMP_CTL_FUNC()
140 return CVMX_ADD_IO_SEG(0x00011F0000000010ull); in CVMX_NPI_CTL_STATUS_FUNC()
151 return CVMX_ADD_IO_SEG(0x00011F0000000008ull); in CVMX_NPI_DBG_SELECT_FUNC()
162 return CVMX_ADD_IO_SEG(0x00011F0000000128ull); in CVMX_NPI_DMA_CONTROL_FUNC()
173 return CVMX_ADD_IO_SEG(0x00011F0000000148ull); in CVMX_NPI_DMA_HIGHP_COUNTS_FUNC()
184 return CVMX_ADD_IO_SEG(0x00011F0000000158ull); in CVMX_NPI_DMA_HIGHP_NADDR_FUNC()
195 return CVMX_ADD_IO_SEG(0x00011F0000000140ull); in CVMX_NPI_DMA_LOWP_COUNTS_FUNC()
206 return CVMX_ADD_IO_SEG(0x00011F0000000150ull); in CVMX_NPI_DMA_LOWP_NADDR_FUNC()
217 return CVMX_ADD_IO_SEG(0x00011F0000000120ull); in CVMX_NPI_HIGHP_DBELL_FUNC()
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H A Dcvmx-dfa-defs.h61 return CVMX_ADD_IO_SEG(0x00011800370007F0ull); in CVMX_DFA_BIST0_FUNC()
72 return CVMX_ADD_IO_SEG(0x00011800370007F8ull); in CVMX_DFA_BIST1_FUNC()
83 return CVMX_ADD_IO_SEG(0x00011800300007F0ull); in CVMX_DFA_BST0_FUNC()
94 return CVMX_ADD_IO_SEG(0x00011800300007F8ull); in CVMX_DFA_BST1_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001180030000000ull); in CVMX_DFA_CFG_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180037000000ull); in CVMX_DFA_CONFIG_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180037000020ull); in CVMX_DFA_CONTROL_FUNC()
138 return CVMX_ADD_IO_SEG(0x0001370000000000ull); in CVMX_DFA_DBELL_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001180030000210ull); in CVMX_DFA_DDR2_ADDR_FUNC()
160 return CVMX_ADD_IO_SEG(0x0001180030000080ull); in CVMX_DFA_DDR2_BUS_FUNC()
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H A Dcvmx-ciu2-defs.h1293 return CVMX_ADD_IO_SEG(0x0001070100102008ull); in CVMX_CIU2_INTR_CIU_READY_FUNC()
1304 return CVMX_ADD_IO_SEG(0x0001070100102010ull); in CVMX_CIU2_INTR_RAM_ECC_CTL_FUNC()
1315 return CVMX_ADD_IO_SEG(0x0001070100102018ull); in CVMX_CIU2_INTR_RAM_ECC_ST_FUNC()
1326 return CVMX_ADD_IO_SEG(0x0001070100102000ull); in CVMX_CIU2_INTR_SLOWDOWN_FUNC()
1329 #define CVMX_CIU2_INTR_SLOWDOWN (CVMX_ADD_IO_SEG(0x0001070100102000ull))
1370 return CVMX_ADD_IO_SEG(0x00010701000C2000ull) + ((offset) & 255) * 8; in CVMX_CIU2_MSI_RCVX()
1381 return CVMX_ADD_IO_SEG(0x00010701000C3000ull) + ((offset) & 255) * 8; in CVMX_CIU2_MSI_SELX()
2140 return CVMX_ADD_IO_SEG(0x0001070100000800ull) + ((offset) & 1) * 8; in CVMX_CIU2_SUM_IOX_INT()
2151 return CVMX_ADD_IO_SEG(0x0001070100000000ull) + ((offset) & 31) * 8; in CVMX_CIU2_SUM_PPX_IP2()
2162 return CVMX_ADD_IO_SEG(0x0001070100000200ull) + ((offset) & 31) * 8; in CVMX_CIU2_SUM_PPX_IP3()
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H A Dcvmx-rad-defs.h61 return CVMX_ADD_IO_SEG(0x0001180070001000ull); in CVMX_RAD_MEM_DEBUG0_FUNC()
72 return CVMX_ADD_IO_SEG(0x0001180070001008ull); in CVMX_RAD_MEM_DEBUG1_FUNC()
83 return CVMX_ADD_IO_SEG(0x0001180070001010ull); in CVMX_RAD_MEM_DEBUG2_FUNC()
94 return CVMX_ADD_IO_SEG(0x0001180070000080ull); in CVMX_RAD_REG_BIST_RESULT_FUNC()
105 return CVMX_ADD_IO_SEG(0x0001180070000008ull); in CVMX_RAD_REG_CMD_BUF_FUNC()
116 return CVMX_ADD_IO_SEG(0x0001180070000000ull); in CVMX_RAD_REG_CTL_FUNC()
127 return CVMX_ADD_IO_SEG(0x0001180070000100ull); in CVMX_RAD_REG_DEBUG0_FUNC()
138 return CVMX_ADD_IO_SEG(0x0001180070000108ull); in CVMX_RAD_REG_DEBUG1_FUNC()
149 return CVMX_ADD_IO_SEG(0x0001180070000150ull); in CVMX_RAD_REG_DEBUG10_FUNC()
160 return CVMX_ADD_IO_SEG(0x0001180070000158ull); in CVMX_RAD_REG_DEBUG11_FUNC()
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H A Dcvmx-srxx-defs.h62 return CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SRXX_COM_CTL()
65 #define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x…
74 return CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SRXX_IGN_RX_FULL()
77 #define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) …
86 …return CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull… in CVMX_SRXX_SPI4_CALX()
98 return CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SRXX_SPI4_STAT()
101 #define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * …
110 return CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SRXX_SW_TICK_CTL()
113 #define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id) & 1) …
122 return CVMX_ADD_IO_SEG(0x0001180090000228ull) + ((block_id) & 1) * 0x8000000ull; in CVMX_SRXX_SW_TICK_DAT()
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H A Dcvmx-agl-defs.h61 return CVMX_ADD_IO_SEG(0x00011800E0000518ull); in CVMX_AGL_GMX_BAD_REG_FUNC()
72 return CVMX_ADD_IO_SEG(0x00011800E0000400ull); in CVMX_AGL_GMX_BIST_FUNC()
83 return CVMX_ADD_IO_SEG(0x00011800E00007F0ull); in CVMX_AGL_GMX_DRV_CTL_FUNC()
94 return CVMX_ADD_IO_SEG(0x00011800E00007F8ull); in CVMX_AGL_GMX_INF_MODE_FUNC()
647 return CVMX_ADD_IO_SEG(0x00011800E00004E8ull); in CVMX_AGL_GMX_RX_PRT_INFO_FUNC()
658 return CVMX_ADD_IO_SEG(0x00011800E00007E8ull); in CVMX_AGL_GMX_RX_TX_STATUS_FUNC()
685 return CVMX_ADD_IO_SEG(0x00011800E0000520ull); in CVMX_AGL_GMX_STAT_BP_FUNC()
1030 return CVMX_ADD_IO_SEG(0x00011800E00004D0ull); in CVMX_AGL_GMX_TX_BP_FUNC()
1041 return CVMX_ADD_IO_SEG(0x00011800E0000498ull); in CVMX_AGL_GMX_TX_COL_ATTEMPT_FUNC()
1052 return CVMX_ADD_IO_SEG(0x00011800E0000488ull); in CVMX_AGL_GMX_TX_IFG_FUNC()
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