Searched refs:CPU_TIMER2_EN (Results 1 – 3 of 3) sorted by relevance
231 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO; in mv_wdt_enable_armv5()280 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN; in mv_wdt_enable_armada_xp()290 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_wdt_disable_armv5()338 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_wdt_disable_armada_xp()
406 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO; in mv_watchdog_enable_armv5()428 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN; in mv_watchdog_enable_armadaxp()438 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_watchdog_disable_armv5()472 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_watchdog_disable_armadaxp()
199 #define CPU_TIMER2_EN 0x00000010 macro