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Searched refs:CLK_WR_4 (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/mips/ingenic/
H A Djz4780_clk_otg.c84 CLK_WR_4(sc, JZ_USBPCR1, reg); in jz4780_clk_otg_init()
145 CLK_WR_4(sc, JZ_USBPCR1, reg); in jz4780_clk_otg_set_freq()
H A Djz4780_clk_pll.c108 CLK_WR_4(sc, sc->clk_reg, reg); in jz4780_clk_pll_init()
205 CLK_WR_4(sc, sc->clk_reg, reg); in jz4780_clk_pll_set_freq()
H A Djz4780_clk_gen.c214 CLK_WR_4(sc, sc->clk_descr->clk_div.div_reg, reg); in jz4780_clk_gen_set_freq()
255 CLK_WR_4(sc, sc->clk_descr->clk_mux.mux_reg, reg); in jz4780_clk_gen_set_mux()
287 CLK_WR_4(sc, off, reg); in jz4780_clk_gen_set_gate()
H A Djz4780_clk.h46 #define CLK_WR_4(_sc, off, val) bus_write_4((_sc)->clk_res, (off), (val)) macro