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Searched refs:CLK_TOP_SYSPLL3_D2 (Results 1 – 13 of 13) sorted by relevance

/f-stack/freebsd/contrib/device-tree/Bindings/spi/
H A Dspi-mt65xx.txt28 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
59 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
/f-stack/freebsd/contrib/device-tree/include/dt-bindings/clock/
H A Dmt7629-clk.h43 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
H A Dmt6797-clk.h57 #define CLK_TOP_SYSPLL3_D2 47 macro
H A Dmt6765-clk.h46 #define CLK_TOP_SYSPLL3_D2 11 macro
H A Dmt8173-clk.h62 #define CLK_TOP_SYSPLL3_D2 52 macro
H A Dmt2712-clk.h45 #define CLK_TOP_SYSPLL3_D2 14 macro
H A Dmt2701-clk.h23 #define CLK_TOP_SYSPLL3_D2 13 macro
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dmt2701.dtsi343 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
403 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
416 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt7623.dtsi511 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
590 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
604 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt7629.dtsi282 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
/f-stack/freebsd/contrib/device-tree/src/arm64/mediatek/
H A Dmt7622.dtsi491 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
573 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt8173.dtsi703 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,