Searched refs:CHSCCDR_IPU1_DI0_CLK_SEL_SHIFT (Results 1 – 2 of 2) sorted by relevance
66 #define CHSCCDR_IPU1_DI0_CLK_SEL_SHIFT 0 macro
465 reg |= (CHSCCDR_CLK_SEL_PREMUXED << CHSCCDR_IPU1_DI0_CLK_SEL_SHIFT); in imx_ccm_ipu_enable()