Searched refs:CD (Results 1 – 25 of 103) sorted by relevance
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34 * Builtin CD line is hooked to ground to prevent JTAG at boot36 * Configure gpio6_C6 as GPIO so dw_mmc builtin CD doesn't43 /* This is where we actually hook up CD */
15 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */16 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
41 /* Hog CD pins */57 /* CD input GPIO */62 /* CD GPIO biasing */
103 …<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deg…110 …<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deg…
146 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USDHC1 CD */147 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
21 /* No CD or WP GPIOs */
33 …<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and degli…
38 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
36 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
571 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */584 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */597 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
297 /* CD */312 /* CD */
527 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */539 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */551 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
77 /* No CD or WP GPIOs */
93 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* CD pin */
629 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */642 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */655 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
144 …<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deg…151 …<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and degli…
124 IMX7ULP_PAD_PTC10__PTC10 0x3 /* CD */
128 …<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deg…
9 CD test\default11 echo "Are you on the right path?" %CD%
9 device cd # CD
13 CD
49 CD EC ; # small m84 EE CD ; # capital N
33 gpios = <&pioC 4 0>; /* CD */
47 # *NOTE* on CD and WP polarity. To use common for all SD/MMC host52 # CD line is active high, i.e. it is high, when a card is55 # CD and WP lines can be implemented on the hardware in one of two60 # latter case. We choose to use the XOR logic for GPIO CD and WP74 The CD line polarity is inverted.