Searched refs:C4 (Results 1 – 9 of 9) sorted by relevance
| /f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_stream/chacha20/dolbeau/ |
| H A D | u8.h | 68 C4, D4) \ argument 72 VEC8_LINE1(A4, B4, C4, D4); \ 76 VEC8_LINE2(A4, B4, C4, D4); \ 80 VEC8_LINE3(A4, B4, C4, D4); \ 84 VEC8_LINE4(A4, B4, C4, D4) 87 B4, C4, D4) \ argument 97 VEC8_LINE1(A4, B4, C4, D4); \ 99 VEC8_LINE2(A4, B4, C4, D4); \ 101 VEC8_LINE3(A4, B4, C4, D4); \ 103 VEC8_LINE4(A4, B4, C4, D4) [all …]
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| /f-stack/app/nginx-1.16.1/conf/ |
| H A D | koi-win | 40 C4 E4 ; # small d 74 E4 C4 ; # capital D
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| H A D | koi-utf | 46 C4 D0B4 ; # small d
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| H A D | win-utf | 63 C4 D094 ; # capital D
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| /f-stack/freebsd/contrib/device-tree/Bindings/pci/ |
| H A D | nvidia,tegra194-pcie.txt | 16 TEGRA194_POWER_DOMAIN_PCIEX4A: C4 53 4: C4 91 In Tegra194, Only controllers C0, C4 & C5 support EP mode. 111 1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS) 112 2. If C0/C1/C2/C3/C4/C5 operate at their respective max link widths and
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| /f-stack/freebsd/contrib/device-tree/src/arm64/amlogic/ |
| H A D | meson-sm1-odroid-c4.dts | 15 model = "Hardkernel ODROID-C4"; 193 model = "SM1-ODROID-C4"; 360 * WARNING: The USB Hub on the Odroid-C4 needs a reset signal
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| /f-stack/app/nginx-1.16.1/contrib/unicode2nginx/ |
| H A D | win-utf | 70 C4 D094 ; #CYRILLIC CAPITAL LETTER DE
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| H A D | koi-utf | 71 C4 D0B4 ; # CYRILLIC SMALL LETTER DE
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| /f-stack/app/redis-5.0.5/deps/jemalloc/build-aux/ |
| H A D | config.guess | 792 C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*)
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