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Searched refs:AXGMAC_SET_BITS (Results 1 – 3 of 3) sorted by relevance

/f-stack/dpdk/drivers/net/axgbe/
H A Daxgbe_dev.c33 AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg); in axgbe_write_ext_mii_regs()
34 AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr); in axgbe_write_ext_mii_regs()
38 AXGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, DATA, val); in axgbe_write_ext_mii_regs()
39 AXGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 1); in axgbe_write_ext_mii_regs()
40 AXGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in axgbe_write_ext_mii_regs()
61 AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg); in axgbe_read_ext_mii_regs()
62 AXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr); in axgbe_read_ext_mii_regs()
66 AXGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 3); in axgbe_read_ext_mii_regs()
67 AXGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in axgbe_read_ext_mii_regs()
239 AXGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); in axgbe_disable_tx_flow_control()
[all …]
H A Daxgbe_ethdev.c581 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); in axgbe_dev_rss_hash_update()
1620 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); in axgbe_timesync_enable()
1623 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); in axgbe_timesync_enable()
1626 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); in axgbe_timesync_enable()
1631 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); in axgbe_timesync_enable()
1632 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); in axgbe_timesync_enable()
1634 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1); in axgbe_timesync_enable()
1637 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); in axgbe_timesync_enable()
1683 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 0); in axgbe_timesync_disable()
1687 AXGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 0); in axgbe_timesync_disable()
[all …]
H A Daxgbe_common.h1407 #define AXGMAC_SET_BITS(_var, _prefix, _field, _val) \ macro