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Searched refs:AR_PHY_TIMING5_CYCPWR_THR1 (Results 1 – 3 of 3) sorted by relevance

/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_ani.c339 OS_REG_READ_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1); in ar9300_ani_init_defaults()
678 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1, value); in ar9300_ani_control()
H A Dar9300phy.h214 #define AR_PHY_TIMING5_CYCPWR_THR1 0x000000FE macro
H A Dar9300_misc.c1465 MS(reg, AR_PHY_TIMING5_CYCPWR_THR1), in ar9300_dma_reg_dump()
1466 MS(reg, AR_PHY_TIMING5_CYCPWR_THR1)); in ar9300_dma_reg_dump()