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Searched refs:AR_PHY_TIMING2 (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_spectral.c185 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET, 0); in ar9300_disable_dc_offset()
549 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET, in ar9300_stop_spectral_scan()
H A Dar9300_misc.c2020 data4 = OS_REG_READ(ah, AR_PHY_TIMING2) & in ar9300_ppm_force()
2022 OS_REG_WRITE(ah, AR_PHY_TIMING2, in ar9300_ppm_force()
2033 data4 = OS_REG_READ(ah, AR_PHY_TIMING2) & ~AR_PHY_TIMING2_USE_FORCE_PPM; in ar9300_ppm_un_force()
2034 OS_REG_WRITE(ah, AR_PHY_TIMING2, data4); in ar9300_ppm_un_force()
2077 OS_REG_READ(ah, AR_PHY_TIMING2) & in ar9300_ppm_get_force_state()
H A Dar9300_reset.c4847 OS_REG_READ(ah, AR_PHY_TIMING2) & in ar9300_reset()
4987 tmp_reg = OS_REG_READ(ah, AR_PHY_TIMING2) & in ar9300_reset()
4989 OS_REG_WRITE(ah, AR_PHY_TIMING2, tmp_reg | save_force_val); in ar9300_reset()
5370 ahp->ah_dc_offset = MS(OS_REG_READ(ah, AR_PHY_TIMING2), in ar9300_reset()
H A Dar9300phy.h44 #define AR_PHY_TIMING2 AR_CHAN_OFFSET(BB_timing_controls_2) macro