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Searched refs:AR_CR (Results 1 – 7 of 7) sorted by relevance

/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv.c61 OS_REG_WRITE(ah, AR_CR, 0); in ar9300_enable_receive()
138 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); in ar9300_stop_dma_receive()
142 if ((OS_REG_READ(ah, AR_CR) & AR_CR_RXE) == 0) { in ar9300_stop_dma_receive()
153 OS_REG_READ(ah, AR_CR), in ar9300_stop_dma_receive()
H A Dar9300_power.c990 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ in ar9300_set_power_mode_wow_sleep()
991 if (!ath_hal_waitfor(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) { in ar9300_set_power_mode_wow_sleep()
994 OS_REG_READ(ah, AR_CR), OS_REG_READ(ah, AR_DIAG_SW)); in ar9300_set_power_mode_wow_sleep()
H A Dar9300_tx99_tgt.c506 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); // set receive disable in ar9300_tx99_tgt_start()
H A Dar9300_xmit_ds.c499 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* set receive disable */ in ar9300__cont_tx_mode()
H A Dar9300_misc.c1404 ath_hal_printf(ah, "AR_CR 0x%x \n", OS_REG_READ(ah, AR_CR)); in ar9300_dma_reg_dump()
3839 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* set receive disable */ in ar9300_tx99_start()
H A Dar9300reg.h33 #define AR_CR AR_MAC_DMA_OFFSET(MAC_DMA_CR) macro
H A Dar9300_reset.c2086 (OS_REG_READ(ah, AR_CR) & AR_CR_RXE)) { in ar9300_chip_reset()